openwrt/target/linux/ramips/dts/GB-PC1.dts
Rosen Penev c25d9cbde8 ramips: Fix GB-PC1 cpuclock again
The intended frequency is 900 MHz, not 90.

Fixes: 7059ab48a6 ("ramips: fix cpuclock for the GB-PC1")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
2018-01-24 07:33:42 +01:00

126 lines
1.9 KiB
Plaintext

/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
model = "GB-PC1";
memory@0 {
device_type = "memory";
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
palmbus: palmbus@1E000000 {
i2c@900 {
status = "okay";
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
system {
label = "gb-pc1:green:system";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
status {
label = "gb-pc1:green:status";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "gb-pc1:green:lan1";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "gb-pc1:green:lan2";
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
m25p,chunked-io = <32>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x1fb0000>;
};
};
};
&cpuclock {
compatible = "fixed-clock";
clock-frequency = <900000000>;
};
&pcie {
status = "okay";
};
&ethernet {
mtd-mac-address = <&factory 0xe000>;
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "wdt", "rgmii2", "uart3";
ralink,function = "gpio";
};
};
};