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3ea6125c50
Currently, the MT7530 DSA subdriver configures the MT7530 switch to provide direct access to switch PHYs, meaning, the switch PHYs listen on the MDIO bus the switch listens on. The PHY muxing feature makes use of this. This is problematic as the PHY may be attached before the switch is initialised, in which case, the PHY will fail to be attached. Since commit 91374ba537bd ("net: dsa: mt7530: support OF-based registration of switch MDIO bus") on mainline Linux, we can describe the switch PHYs on the MDIO bus of the switch on the device tree. When the PHY is described this way, the switch will be initialised first, then the switch MDIO bus will be registered. Only after these steps, the PHY will be attached. Describe the switch PHYs on mt7621.dtsi and remove defining the switch PHY on the SoC's mdio bus node. When the PHY muxing is in use, the interrupts for the muxed PHY won't work, therefore delete the "interrupts" property on the devices where the PHY muxing feature is in use. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
221 lines
3.7 KiB
Plaintext
221 lines
3.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Arcadyan WE420223-99";
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compatible = "arcadyan,we420223-99", "mediatek,mt7621-soc";
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_wps_green;
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led-wifi = &led_wifi_green;
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};
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chosen {
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bootargs = "console=ttyS0,57600 ubi.mtd=5 root=/dev/ubiblock0_0";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power_green: power_green {
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gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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default-state = "on";
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};
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led_power_red: power_red {
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_FAULT;
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};
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led_wifi_blue: wifi_blue {
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gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_WLAN;
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};
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led_wifi_green: wifi_green {
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gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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};
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led_wps_red: wps_red {
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gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_WPS;
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};
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led_wps_green: wps_green {
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gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WPS;
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};
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led_followme_r: followme_red {
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gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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};
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led_followme_g: followme_green {
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gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <70000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ALL";
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reg = <0x0 0x2000000>;
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read-only;
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};
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partition@1 {
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label = "Bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "Config";
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reg = <0x30000 0x10000>;
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};
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partition@40000 {
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label = "Factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x4da8>;
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};
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};
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};
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partition@50000 {
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label = "kernel";
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reg = <0x50000 0x1f60000>;
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};
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partition@490000 {
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label = "rootfs";
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reg = <0x490000 0x1b20000>;
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};
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partition@1000000 {
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label = "Kernel2";
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reg = <0x1000000 0xfb0000>;
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};
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partition@1440000 {
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label = "RootFS2";
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reg = <0x1440000 0xb70000>;
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};
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partition@1fb0000 {
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label = "glbcfg";
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reg = <0x1fb0000 0x10000>;
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read-only;
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};
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partition@1fc0000 {
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label = "board_data";
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reg = <0x1fc0000 0x10000>;
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read-only;
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};
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partition@1fd0000 {
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label = "glbcfg2";
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reg = <0x1fd0000 0x10000>;
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read-only;
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};
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partition@1fe0000 {
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label = "board_data2";
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reg = <0x1fe0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&xhci {
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status = "disabled";
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};
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&switch0 {
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ports {
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port@1 {
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status = "okay";
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label = "swp1";
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};
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};
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};
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&gmac1 {
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status = "okay";
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label = "swp0";
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phy-handle = <ðphy0>;
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};
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ðphy0 {
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/delete-property/ interrupts;
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};
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&pcie {
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status = "okay";
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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};
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