mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
f2f42a54e8
The qca8k patch series brings the numbering to 799. This patch renames 7xx patches to create space for more backports to be added. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> [rename 729->719] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
30 lines
1.3 KiB
Diff
30 lines
1.3 KiB
Diff
From 731d613338ec6de482053ffa3f71be2325b0f8eb Mon Sep 17 00:00:00 2001
|
|
From: Ansuel Smith <ansuelsmth@gmail.com>
|
|
Date: Thu, 14 Oct 2021 00:39:09 +0200
|
|
Subject: dt-bindings: net: dsa: qca8k: Document support for CPU port 6
|
|
|
|
The switch now support CPU port to be set 6 instead of be hardcoded to
|
|
0. Document support for it and describe logic selection.
|
|
|
|
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 +++++-
|
|
1 file changed, 5 insertions(+), 1 deletion(-)
|
|
|
|
--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
|
|
+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
|
|
@@ -29,7 +29,11 @@ the mdio MASTER is used as communication
|
|
Don't use mixed external and internal mdio-bus configurations, as this is
|
|
not supported by the hardware.
|
|
|
|
-The CPU port of this switch is always port 0.
|
|
+This switch support 2 CPU port. Normally and advised configuration is with
|
|
+CPU port set to port 0. It is also possible to set the CPU port to port 6
|
|
+if the device requires it. The driver will configure the switch to the defined
|
|
+port. With both CPU port declared the first CPU port is selected as primary
|
|
+and the secondary CPU ignored.
|
|
|
|
A CPU port node has the following optional node:
|
|
|