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85cef1cf22
Manually rebased
bcm27xx/patches-5.4/950-0089-cgroup-Disable-cgroup-memory-by-default.patch
Replaced with patch from Raspberry Pi kernel 5.10 patches
mvebu/patches-5.4/002-PCI-aardvark-Don-t-rely-on-jiffies-while-holding-spi.patch
Applied upstream
All others updated automatically.
Compile-tested on: ath79/generic, lantiq/xrx200, brcm27xx
Runtime-tested on: ath79/generic, lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From 1d78f72cb5a387922870e2a54228be25f84f95f6 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 16 Jun 2020 10:23:29 +0100
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Subject: [PATCH] Revert "spi: spi-bcm2835: Disable forced software
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CS"
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This reverts commit 2697f0186db346176832b8eb79adaf5c874681e8.
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See: https://github.com/raspberrypi/linux/pull/3687
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---
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drivers/spi/spi-bcm2835.c | 37 +++++++++++++++++++++++++++++++++++++
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1 file changed, 37 insertions(+)
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--- a/drivers/spi/spi-bcm2835.c
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+++ b/drivers/spi/spi-bcm2835.c
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@@ -1241,6 +1241,43 @@ static int bcm2835_spi_setup(struct spi_
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return -EINVAL;
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}
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+ /*
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+ * Translate native CS to GPIO
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+ *
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+ * FIXME: poking around in the gpiolib internals like this is
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+ * not very good practice. Find a way to locate the real problem
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+ * and fix it. Why is the GPIO descriptor in spi->cs_gpiod
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+ * sometimes not assigned correctly? Erroneous device trees?
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+ */
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+
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+ /* get the gpio chip for the base */
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+ chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
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+ if (!chip)
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+ return 0;
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+
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+ /*
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+ * Retrieve the corresponding GPIO line used for CS.
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+ * The inversion semantics will be handled by the GPIO core
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+ * code, so we pass GPIOS_OUT_LOW for "unasserted" and
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+ * the correct flag for inversion semantics. The SPI_CS_HIGH
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+ * on spi->mode cannot be checked for polarity in this case
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+ * as the flag use_gpio_descriptors enforces SPI_CS_HIGH.
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+ */
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+ if (of_property_read_bool(spi->dev.of_node, "spi-cs-high"))
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+ lflags = GPIO_ACTIVE_HIGH;
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+ else
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+ lflags = GPIO_ACTIVE_LOW;
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+ spi->cs_gpiod = gpiochip_request_own_desc(chip, 8 - spi->chip_select,
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+ DRV_NAME,
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+ lflags,
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+ GPIOD_OUT_LOW);
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+ if (IS_ERR(spi->cs_gpiod))
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+ return PTR_ERR(spi->cs_gpiod);
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+
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+ /* and set up the "mode" and level */
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+ dev_info(&spi->dev, "setting up native-CS%i to use GPIO\n",
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+ spi->chip_select);
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+
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return 0;
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}
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