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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
105 lines
3.2 KiB
Diff
105 lines
3.2 KiB
Diff
From ddf78df1db8752247e89a68231338a194e5dc52b Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 19 Dec 2019 17:22:24 +0100
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Subject: [PATCH] drm/vc4: hdmi: Add PHY RNG enable / disable function
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Let's continue the implementation of hooks for the parts that change in the
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BCM2711 SoC with the PHY RNG setup.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 15 +++++++++------
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drivers/gpu/drm/vc4/vc4_hdmi.h | 8 ++++++++
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drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 15 +++++++++++++++
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3 files changed, 32 insertions(+), 6 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -765,9 +765,9 @@ static int vc4_hdmi_audio_trigger(struct
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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vc4_hdmi_set_audio_infoframe(encoder);
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- HDMI_WRITE(HDMI_TX_PHY_CTL_0,
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- HDMI_READ(HDMI_TX_PHY_CTL_0) &
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- ~VC4_HDMI_TX_PHY_RNG_PWRDN);
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+
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+ if (vc4_hdmi->variant->phy_rng_enable)
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+ vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
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HDMI_WRITE(HDMI_MAI_CTL,
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VC4_SET_FIELD(vc4_hdmi->audio.channels,
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@@ -779,9 +779,10 @@ static int vc4_hdmi_audio_trigger(struct
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VC4_HD_MAI_CTL_DLATE |
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VC4_HD_MAI_CTL_ERRORE |
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VC4_HD_MAI_CTL_ERRORF);
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- HDMI_WRITE(HDMI_TX_PHY_CTL_0,
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- HDMI_READ(HDMI_TX_PHY_CTL_0) |
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- VC4_HDMI_TX_PHY_RNG_PWRDN);
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+
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+ if (vc4_hdmi->variant->phy_rng_disable)
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+ vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
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+
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break;
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default:
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break;
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@@ -1429,6 +1430,8 @@ static const struct vc4_hdmi_variant bcm
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.reset = vc4_hdmi_reset,
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.phy_init = vc4_hdmi_phy_init,
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.phy_disable = vc4_hdmi_phy_disable,
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+ .phy_rng_enable = vc4_hdmi_phy_rng_enable,
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+ .phy_rng_disable = vc4_hdmi_phy_rng_disable,
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};
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static const struct of_device_id vc4_hdmi_dt_match[] = {
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -47,6 +47,12 @@ struct vc4_hdmi_variant {
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/* Callback to disable the PHY */
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void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
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+
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+ /* Callback to enable the RNG in the PHY */
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+ void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
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+
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+ /* Callback to disable the RNG in the PHY */
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+ void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
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};
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/* HDMI audio information */
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@@ -107,5 +113,7 @@ encoder_to_vc4_hdmi(struct drm_encoder *
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void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
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+void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
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+void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
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#endif /* _VC4_HDMI_H_ */
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--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
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@@ -7,6 +7,7 @@
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*/
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#include "vc4_hdmi.h"
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+#include "vc4_regs.h"
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#include "vc4_hdmi_regs.h"
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void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode)
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@@ -23,3 +24,17 @@ void vc4_hdmi_phy_disable(struct vc4_hdm
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{
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HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0xf << 16);
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}
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+
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+void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi)
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+{
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+ HDMI_WRITE(HDMI_TX_PHY_CTL_0,
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+ HDMI_READ(HDMI_TX_PHY_CTL_0) &
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+ ~VC4_HDMI_TX_PHY_RNG_PWRDN);
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+}
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+
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+void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi)
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+{
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+ HDMI_WRITE(HDMI_TX_PHY_CTL_0,
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+ HDMI_READ(HDMI_TX_PHY_CTL_0) |
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+ VC4_HDMI_TX_PHY_RNG_PWRDN);
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+}
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