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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
101 lines
2.8 KiB
Diff
101 lines
2.8 KiB
Diff
From de6caac0f49de31d79b487ac1a998f0cfafdd5af Mon Sep 17 00:00:00 2001
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From: John Cox <jc@kynesim.co.uk>
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Date: Wed, 22 Sep 2021 19:05:30 +0100
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Subject: [PATCH] media: rpivid: Ensure IRQs have completed before
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uniniting context
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Before uniniting the decode context sync with the IRQ queues to ensure
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that decode no longer has any buffers in use. This fixes a problem that
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manifested as ffmpeg leaking CMA buffers when it did a stream off on
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OUTPUT before CAPTURE, though in reality it was probably much more
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dangerous than that.
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Signed-off-by: John Cox <jc@kynesim.co.uk>
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---
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drivers/staging/media/rpivid/rpivid_h265.c | 58 ++++++++++++++++++++--
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1 file changed, 53 insertions(+), 5 deletions(-)
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--- a/drivers/staging/media/rpivid/rpivid_h265.c
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+++ b/drivers/staging/media/rpivid/rpivid_h265.c
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@@ -2387,12 +2387,50 @@ static void dec_state_delete(struct rpiv
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kfree(s);
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}
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-static void rpivid_h265_stop(struct rpivid_ctx *ctx)
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+struct irq_sync {
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+ atomic_t done;
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+ wait_queue_head_t wq;
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+ struct rpivid_hw_irq_ent irq_ent;
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+};
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+
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+static void phase2_sync_claimed(struct rpivid_dev *const dev, void *v)
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{
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- struct rpivid_dev *const dev = ctx->dev;
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- unsigned int i;
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+ struct irq_sync *const sync = v;
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- v4l2_info(&dev->v4l2_dev, "%s\n", __func__);
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+ atomic_set(&sync->done, 1);
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+ wake_up(&sync->wq);
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+}
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+
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+static void phase1_sync_claimed(struct rpivid_dev *const dev, void *v)
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+{
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+ struct irq_sync *const sync = v;
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+
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+ rpivid_hw_irq_active1_enable_claim(dev, 1);
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+ rpivid_hw_irq_active2_claim(dev, &sync->irq_ent, phase2_sync_claimed, sync);
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+}
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+
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+/* Sync with IRQ operations
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+ *
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+ * Claims phase1 and phase2 in turn and waits for the phase2 claim so any
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+ * pending IRQ ops will have completed by the time this returns
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+ *
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+ * phase1 has counted enables so must reenable once claimed
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+ * phase2 has unlimited enables
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+ */
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+static void irq_sync(struct rpivid_dev *const dev)
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+{
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+ struct irq_sync sync;
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+
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+ atomic_set(&sync.done, 0);
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+ init_waitqueue_head(&sync.wq);
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+
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+ rpivid_hw_irq_active1_claim(dev, &sync.irq_ent, phase1_sync_claimed, &sync);
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+ wait_event(sync.wq, atomic_read(&sync.done));
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+}
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+
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+static void h265_ctx_uninit(struct rpivid_dev *const dev, struct rpivid_ctx *ctx)
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+{
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+ unsigned int i;
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dec_env_uninit(ctx);
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dec_state_delete(ctx);
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@@ -2409,6 +2447,16 @@ static void rpivid_h265_stop(struct rpiv
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gptr_free(dev, ctx->coeff_bufs + i);
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}
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+static void rpivid_h265_stop(struct rpivid_ctx *ctx)
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+{
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+ struct rpivid_dev *const dev = ctx->dev;
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+
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+ v4l2_info(&dev->v4l2_dev, "%s\n", __func__);
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+
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+ irq_sync(dev);
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+ h265_ctx_uninit(dev, ctx);
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+}
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+
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static int rpivid_h265_start(struct rpivid_ctx *ctx)
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{
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struct rpivid_dev *const dev = ctx->dev;
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@@ -2470,7 +2518,7 @@ static int rpivid_h265_start(struct rpiv
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return 0;
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fail:
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- rpivid_h265_stop(ctx);
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+ h265_ctx_uninit(dev, ctx);
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return -ENOMEM;
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}
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