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https://github.com/openwrt/openwrt.git
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d1a015f8ca
The WAN port has the wrong configuration in the kernel for the DVA-G3810BN/TL The WAN port uses the internal phy, but it isn't enabled at the kernel board data. Fix it. Signed-off-by: Daniel Gonzalez Cabanelas <dgcbueu@gmail.com> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
126 lines
3.7 KiB
Diff
126 lines
3.7 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -2216,6 +2216,106 @@ static struct board_info __initdata boar
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},
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};
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+static struct sprom_fixup __initdata vh4032n_fixups[] = {
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+ { .offset = 2, .value = 0x04d2 },
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+ { .offset = 4, .value = 0x4350 },
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+ { .offset = 65, .value = 0x1300 },
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+ { .offset = 68, .value = 0x0402 },
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+ { .offset = 70, .value = 0x0090 },
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+ { .offset = 71, .value = 0x4c19 },
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+ { .offset = 72, .value = 0x2345 },
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+ { .offset = 87, .value = 0x0315 },
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+ { .offset = 88, .value = 0x0315 },
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+ { .offset = 96, .value = 0x2048 },
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+ { .offset = 97, .value = 0xfed7 },
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+ { .offset = 98, .value = 0x15a6 },
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+ { .offset = 99, .value = 0xfaee },
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+ { .offset = 100, .value = 0x3e3a },
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+ { .offset = 101, .value = 0x3a36 },
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+ { .offset = 102, .value = 0xff7f },
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+ { .offset = 103, .value = 0x11b9 },
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+ { .offset = 104, .value = 0xfc53 },
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+ { .offset = 105, .value = 0xffe6 },
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+ { .offset = 106, .value = 0xfdd2 },
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+ { .offset = 107, .value = 0xfe49 },
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+ { .offset = 108, .value = 0xff6a },
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+ { .offset = 109, .value = 0x136e },
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+ { .offset = 110, .value = 0xfbed },
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+ { .offset = 111, .value = 0x0000 },
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+ { .offset = 112, .value = 0x2048 },
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+ { .offset = 113, .value = 0xfee2 },
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+ { .offset = 114, .value = 0x15e5 },
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+ { .offset = 115, .value = 0xfaed },
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+ { .offset = 116, .value = 0x3e3a },
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+ { .offset = 117, .value = 0x3a36 },
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+ { .offset = 118, .value = 0xffc8 },
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+ { .offset = 119, .value = 0x12b8 },
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+ { .offset = 120, .value = 0xfca1 },
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+ { .offset = 121, .value = 0xff9b },
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+ { .offset = 122, .value = 0x122a },
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+ { .offset = 123, .value = 0xfcc8 },
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+ { .offset = 124, .value = 0xff95 },
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+ { .offset = 125, .value = 0x146b },
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+ { .offset = 126, .value = 0xfbba },
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+ { .offset = 127, .value = 0x0000 },
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+ { .offset = 161, .value = 0x0000 },
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+ { .offset = 162, .value = 0x0000 },
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+ { .offset = 169, .value = 0x0000 },
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+ { .offset = 170, .value = 0x0000 },
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+ { .offset = 171, .value = 0x0000 },
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+ { .offset = 172, .value = 0x0000 },
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+ { .offset = 173, .value = 0x0000 },
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+ { .offset = 174, .value = 0x0000 },
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+ { .offset = 175, .value = 0x0000 },
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+ { .offset = 176, .value = 0x0000 },
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+ { .offset = 219, .value = 0x1108 },
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+};
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+
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+static struct board_info __initdata board_VH4032N = {
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+ .name = "VH4032N",
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+ .expected_cpu_id = 0x6368,
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+
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+ .has_pci = 1,
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+ .use_fallback_sprom = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 2,
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "LAN4",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "LAN3",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "LAN2",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "LAN1",
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+ },
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+ },
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+ },
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+
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+ .fallback_sprom = {
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+ .type = SPROM_BCM43222,
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+ .pci_bus = 0,
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+ .pci_dev = 1,
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+ .board_fixups = vh4032n_fixups,
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+ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
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+ },
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+};
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+
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static struct sprom_fixup __initdata wap5813n_fixups[] = {
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{ .offset = 97, .value = 0xfeed },
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{ .offset = 98, .value = 0x15d1 },
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@@ -2498,6 +2598,7 @@ static const struct board_info __initcon
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&board_HG622,
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&board_HG655b,
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&board_P870HW51A_V2,
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+ &board_VH4032N,
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&board_VR3025u,
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&board_VR3025un,
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&board_VR3026e,
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@@ -2609,6 +2710,7 @@ static struct of_device_id const bcm963x
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{ .compatible = "huawei,hg655b", .data = &board_HG655b, },
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{ .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
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{ .compatible = "netgear,evg2000", .data = &board_EVG2000, },
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+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
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{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
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#endif
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#ifdef CONFIG_BCM63XX_CPU_63268
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