openwrt/target/linux/brcm2708/patches-4.19/950-0333-bcm2835-dma-Add-support-for-per-channel-flags.patch
Álvaro Fernández Rojas 2340c646e6 brcm2708: update to latest patches from RPi foundation
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-08-27 11:10:01 +02:00

49 lines
2.1 KiB
Diff

From f64a82df270c494b5857508d7e5287b1f3fee3e6 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 20 Jul 2018 22:03:41 +0100
Subject: [PATCH 333/773] bcm2835-dma: Add support for per-channel flags
Add the ability to interpret the high bits of the dreq specifier as
flags to be included in the DMA_CS register. The motivation for this
change is the ability to set the DISDEBUG flag for SD card transfers
to avoid corruption when using the VPU debugger.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/dma/bcm2835-dma.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/drivers/dma/bcm2835-dma.c
+++ b/drivers/dma/bcm2835-dma.c
@@ -146,6 +146,10 @@ struct bcm2835_desc {
#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
+#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \
+ BCM2835_DMA_PANIC_PRIORITY(15) | \
+ BCM2835_DMA_WAIT_FOR_WRITES | \
+ BCM2835_DMA_DIS_DEBUG))
#define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */
#define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
#define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
@@ -461,7 +465,8 @@ static void bcm2835_dma_start_desc(struc
c->desc = d = to_bcm2835_dma_desc(&vd->tx);
writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
+ writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
+ c->chan_base + BCM2835_DMA_CS);
}
static irqreturn_t bcm2835_dma_callback(int irq, void *data)
@@ -488,7 +493,8 @@ static irqreturn_t bcm2835_dma_callback(
* if this IRQ handler is threaded.) If the channel is finished, it
* will remain idle despite the ACTIVE flag being set.
*/
- writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
+ writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE |
+ BCM2835_DMA_CS_FLAGS(c->dreq),
c->chan_base + BCM2835_DMA_CS);
d = c->desc;