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8e49b4b902
This change set enables frequency scaling on ipq806x, which speeds-up the CPU and allows it to achieve its max frequency. These patches are cherry-picked & backported from the following location: *130-132: linux-next *133-143: LKML - https://lkml.org/lkml/2015/3/21/15 *144: derived from other qcom similar dts *145: derived from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14/drivers/cpufreq/cpufreq-krait.c Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 45730
61 lines
1.7 KiB
Diff
61 lines
1.7 KiB
Diff
From 6793b3cd5da817c4be218bd8632f07cf4d2b0d26 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Wed, 19 Nov 2014 14:48:59 +0100
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Subject: [PATCH] clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT
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&& index >= 3
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If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
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so theoretically multiple parents could be enabled at the same time, but in
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practice only one bit should ever be 1. So to select parent 0, set
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the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
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parent 3, 0x08, etc.
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But the current code does:
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if (mux->flags & CLK_MUX_INDEX_BIT)
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index = (1 << ffs(index));
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Which means that:
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For an input index of 0, ffs returns 0, so we set the register
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to 0x01, ok.
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For an input index of 1, ffs returns 1, so we set the register
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to 0x02, ok.
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For an input index of 2, ffs returns 2, so we set the register
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to 0x04, ok.
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For an input index of 3, ffs returns 1, so we set the register
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to 0x02, not good!
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The code should simply be:
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if (mux->flags & CLK_MUX_INDEX_BIT)
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index = 1 << index;
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Which always does the right thing, this commit fixes this.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Signed-off-by: Michael Turquette <mturquette@linaro.org>
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---
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drivers/clk/clk-mux.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
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index 4f96ff3..6e1ecf9 100644
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--- a/drivers/clk/clk-mux.c
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+++ b/drivers/clk/clk-mux.c
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@@ -77,7 +77,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
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else {
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if (mux->flags & CLK_MUX_INDEX_BIT)
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- index = (1 << ffs(index));
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+ index = 1 << index;
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if (mux->flags & CLK_MUX_INDEX_ONE)
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index++;
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--
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2.1.4
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