openwrt/target/linux/ath79/dts/ar9344_winchannel_wb2000.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Winchannel WB2000";
compatible = "winchannel,wb2000", "qca,ar9344";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
i2c {
compatible = "i2c-gpio";
gpios = <&gpio 17 GPIO_ACTIVE_HIGH
&gpio 16 GPIO_ACTIVE_HIGH
>;
#address-cells = <1>;
#size-cells = <0>;
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
leds {
compatible = "gpio-leds";
wlan2g {
label = "green:2g";
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
usb {
label = "green:usb";
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
trigger-sources = <&hub_port1>, <&hub_port2>;
linux,default-trigger = "usbport";
};
led_system: system {
label = "green:system";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan {
label = "green:5g";
gpios = <&ath9k 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&ref {
clock-frequency = <40000000>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xf80000>;
compatible = "denx,uimage";
};
partition@fd0000 {
label = "nvram";
reg = <0xfd0000 0x10000>;
read-only;
};
art: partition@fe0000 {
label = "art";
reg = <0xfe0000 0x10000>;
read-only;
};
addr: partition@ff0000 {
label = "addr";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
mtd-mac-address = <&addr 0x0>;
mtd-mac-address-increment = <0x10>;
#gpio-cells = <2>;
gpio-controller;
};
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
#trigger-source-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
&usb_phy {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&addr 0x0>;
};
&mdio0 {
status = "okay";
phy-mask = <0x10>;
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&eth0 {
status = "okay";
pll-data = <0xe000000 0x04000101 0x04001313>;
mtd-mac-address = <&addr 0x0>;
mtd-mac-address-increment = <0x21>;
phy-mode = "rgmii-rxid";
phy-handle = <&phy4>;
gmac-config {
device = <&gmac>;
rgmii-gmac0 = <1>;
rxd-delay = <1>;
rxdv-delay = <1>;
};
};