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da42c329c6
This patch converts legacy Ralink SoCs and MT7620 WiFi calibration data to NVMEM format. The EEPROM size is 0x200. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
103 lines
1.6 KiB
Plaintext
103 lines
1.6 KiB
Plaintext
#include "rt3050.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
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model = "Planex MZK-WDPR";
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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flash@1f000000 {
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compatible = "cfi-flash";
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reg = <0x1f000000 0x800000>;
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bank-width = <2>;
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device-width = <2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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compatible = "nvmem-cells";
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label = "factory";
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reg = <0x40000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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macaddr_factory_28: macaddr@28 {
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reg = <0x28 0x6>;
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};
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};
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partition@7f0000 {
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label = "Data3G";
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reg = <0x7f0000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x680000>;
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};
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};
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};
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gpio-export {
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compatible = "gpio-export";
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lcd_ctrl1 {
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gpio-export,name = "lcd_ctrl1";
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gpio-export,output = <0>;
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gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&state_default {
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gpio {
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groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
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function = "gpio";
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};
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};
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ðernet {
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nvmem-cells = <&macaddr_factory_28>;
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nvmem-cell-names = "mac-address";
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};
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&esw {
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mediatek,portmap = <0x2f>;
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};
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&wmac {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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};
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&otg {
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status = "okay";
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};
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