openwrt/target/linux/ramips/dts/rt3352_dlink_dir-615-h1.dts
Adrian Schmutzler 3b0264eddb ramips/rt305x: Name DTS files based on scheme
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-07-10 17:36:29 +02:00

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/dts-v1/;
#include "rt3352.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "dlink,dir-615-h1", "ralink,rt3352-soc";
model = "D-Link DIR-615 H1";
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_green;
led-running = &led_status_green;
led-upgrade = &led_status_green;
};
leds {
compatible = "gpio-leds";
status {
label = "dir-615-h1:amber:status";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};
led_status_green: status2 {
label = "dir-615-h1:green:status";
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
wan {
label = "dir-615-h1:amber:wan";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
wan2 {
label = "dir-615-h1:green:wan";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
};
wps {
label = "dir-615-h1:blue:wps";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x3b0000>;
};
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "jtag", "uartf";
ralink,function = "gpio";
};
};
};
&ethernet {
mtd-mac-address = <&factory 0x28>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins &mdio_pins>;
};
&esw {
mediatek,portmap = <0x2f>;
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};