mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
3b0264eddb
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
134 lines
2.3 KiB
Plaintext
134 lines
2.3 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "rt3050.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "sitecom,wl-351", "ralink,rt3052-soc";
|
|
model = "Sitecom WL-351 v1 002";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
};
|
|
|
|
cfi@1f000000 {
|
|
compatible = "cfi-flash";
|
|
reg = <0x1f000000 0x800000>;
|
|
bank-width = <2>;
|
|
device-width = <2>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x3b0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_power: power {
|
|
label = "wl-351:amber:power";
|
|
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
unpopulated {
|
|
label = "wl-351:amber:unpopulated";
|
|
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
unpopulated2 {
|
|
label = "wl-351:blue:unpopulated";
|
|
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <20>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
|
|
rtl8366rb {
|
|
compatible = "realtek,rtl8366rb";
|
|
gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
|
|
gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
mtd-mac-address = <&factory 0x4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii_pins>;
|
|
};
|
|
|
|
&esw {
|
|
ralink,rgmii = <1>;
|
|
mediatek,portmap = <0x3f>;
|
|
ralink,fct2 = <0x0002500c>;
|
|
/*
|
|
* ext phy base addr 31, rx/tx clock skew 0,
|
|
* turbo mii off, rgmi 3.3v off, port 5 polling off
|
|
* port5: enabled, gige, full-duplex, rx/tx-flow-control
|
|
* port6: enabled, gige, full-duplex, rx/tx-flow-control
|
|
*/
|
|
ralink,fpa2 = <0x1f003fff>;
|
|
};
|
|
|
|
&wmac {
|
|
ralink,mtd-eeprom = <&factory 0>;
|
|
};
|
|
|
|
&otg {
|
|
status = "okay";
|
|
};
|