mirror of
https://github.com/openwrt/openwrt.git
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5159d71983
All patches of LSDK 19.03 were ported to Openwrt kernel. We still used an all-in-one patch for each IP/feature for OpenWrt. Below are the changes this patch introduced. - Updated original IP/feature patches to LSDK 19.03. - Added new IP/feature patches for eTSEC/PTP/TMU. - Squashed scattered patches into IP/feature patches. - Updated config-4.14 correspondingly. - Refreshed all patches. More info about LSDK and the kernel: - https://lsdk.github.io/components.html - https://source.codeaurora.org/external/qoriq/qoriq-components/linux Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
341 lines
12 KiB
Diff
341 lines
12 KiB
Diff
From 2a1351617985ef47581de825ae1bbf1d42bf3200 Mon Sep 17 00:00:00 2001
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From: Yangbo Lu <yangbo.lu@nxp.com>
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Date: Mon, 6 May 2019 17:29:32 +0800
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Subject: [PATCH] config: support layerscape
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This is an integrated patch of config for layerscape
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Signed-off-by: Alison Wang <alison.wang@nxp.com>
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Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
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Signed-off-by: Biwen Li <biwen.li@nxp.com>
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
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Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
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Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
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Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
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Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Signed-off-by: Li Yang <leoyang.li@nxp.com>
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Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
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Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
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Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
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Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
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Signed-off-by: Razvan Stefanescu <razvan.stefanescu@nxp.com>
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Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
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Signed-off-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
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Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
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Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
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Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
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---
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drivers/Makefile | 2 ++
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drivers/irqchip/Makefile | 1 +
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drivers/net/ethernet/freescale/Kconfig | 14 +++++----
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drivers/net/ethernet/freescale/Makefile | 3 ++
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drivers/ptp/Kconfig | 16 +++++-----
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drivers/soc/Kconfig | 1 +
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drivers/soc/fsl/Kconfig | 22 +++++++++++++
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drivers/soc/fsl/Kconfig.arm | 16 ++++++++++
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drivers/soc/fsl/Makefile | 5 +++
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drivers/soc/fsl/layerscape/Kconfig | 10 ++++++
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drivers/soc/fsl/layerscape/Makefile | 1 +
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drivers/staging/Kconfig | 4 +++
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drivers/staging/Makefile | 2 ++
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drivers/staging/fsl-dpaa2/Kconfig | 56 ++++++++++++++++++++++++++++++++-
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drivers/staging/fsl-dpaa2/Makefile | 4 +++
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15 files changed, 142 insertions(+), 15 deletions(-)
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create mode 100644 drivers/soc/fsl/Kconfig.arm
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create mode 100644 drivers/soc/fsl/layerscape/Kconfig
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create mode 100644 drivers/soc/fsl/layerscape/Makefile
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--- a/drivers/Makefile
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+++ b/drivers/Makefile
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@@ -20,6 +20,8 @@ obj-$(CONFIG_PCI) += pci/
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obj-$(CONFIG_PCI_ENDPOINT) += pci/endpoint/
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# PCI dwc controller drivers
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obj-y += pci/dwc/
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+# PCI mobiveil controller drivers
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+obj-y += pci/mobiveil/
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obj-$(CONFIG_PARISC) += parisc/
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obj-$(CONFIG_RAPIDIO) += rapidio/
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--- a/drivers/irqchip/Makefile
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+++ b/drivers/irqchip/Makefile
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@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed
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obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
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obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
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obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
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+obj-$(CONFIG_QUICC_ENGINE) += irq-qeic.o
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--- a/drivers/net/ethernet/freescale/Kconfig
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+++ b/drivers/net/ethernet/freescale/Kconfig
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@@ -5,10 +5,11 @@
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config NET_VENDOR_FREESCALE
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bool "Freescale devices"
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default y
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- depends on FSL_SOC || QUICC_ENGINE || CPM1 || CPM2 || PPC_MPC512x || \
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- M523x || M527x || M5272 || M528x || M520x || M532x || \
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- ARCH_MXC || ARCH_MXS || (PPC_MPC52xx && PPC_BESTCOMM) || \
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- ARCH_LAYERSCAPE || COMPILE_TEST
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+ depends on FSL_SOC || (QUICC_ENGINE && PPC32) || CPM1 || CPM2 || \
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+ PPC_MPC512x || M523x || M527x || M5272 || M528x || M520x || \
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+ M532x || ARCH_MXC || ARCH_MXS || \
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+ (PPC_MPC52xx && PPC_BESTCOMM) || ARCH_LAYERSCAPE || \
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+ COMPILE_TEST
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---help---
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If you have a network (Ethernet) card belonging to this class, say Y.
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@@ -73,7 +74,7 @@ config FSL_XGMAC_MDIO
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config UCC_GETH
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tristate "Freescale QE Gigabit Ethernet"
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- depends on QUICC_ENGINE
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+ depends on QUICC_ENGINE && FSL_SOC && PPC32
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select FSL_PQ_MDIO
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select PHYLIB
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---help---
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@@ -94,7 +95,8 @@ config GIANFAR
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This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
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and MPC86xx family of chips, the eTSEC on LS1021A and the FEC
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on the 8540.
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-
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+source "drivers/net/ethernet/freescale/sdk_fman/Kconfig"
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+source "drivers/net/ethernet/freescale/sdk_dpaa/Kconfig"
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source "drivers/net/ethernet/freescale/dpaa/Kconfig"
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endif # NET_VENDOR_FREESCALE
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--- a/drivers/net/ethernet/freescale/Makefile
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+++ b/drivers/net/ethernet/freescale/Makefile
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@@ -20,5 +20,8 @@ gianfar_driver-objs := gianfar.o \
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obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
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ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
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+obj-$(if $(CONFIG_FSL_SDK_FMAN),y) += sdk_fman/
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+obj-$(if $(CONFIG_FSL_SDK_DPAA_ETH),y) += sdk_dpaa/
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+
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obj-$(CONFIG_FSL_FMAN) += fman/
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obj-$(CONFIG_FSL_DPAA_ETH) += dpaa/
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--- a/drivers/ptp/Kconfig
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+++ b/drivers/ptp/Kconfig
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@@ -41,19 +41,19 @@ config PTP_1588_CLOCK_DTE
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To compile this driver as a module, choose M here: the module
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will be called ptp_dte.
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-config PTP_1588_CLOCK_GIANFAR
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- tristate "Freescale eTSEC as PTP clock"
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- depends on GIANFAR
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+config PTP_1588_CLOCK_QORIQ
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+ tristate "Freescale QorIQ 1588 timer as PTP clock"
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+ depends on GIANFAR || FSL_DPAA_ETH || FSL_SDK_DPAA_ETH
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depends on PTP_1588_CLOCK
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default y
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help
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- This driver adds support for using the eTSEC as a PTP
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- clock. This clock is only useful if your PTP programs are
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- getting hardware time stamps on the PTP Ethernet packets
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- using the SO_TIMESTAMPING API.
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+ This driver adds support for using the Freescale QorIQ 1588
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+ timer as a PTP clock. This clock is only useful if your PTP
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+ programs are getting hardware time stamps on the PTP Ethernet
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+ packets using the SO_TIMESTAMPING API.
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To compile this driver as a module, choose M here: the module
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- will be called gianfar_ptp.
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+ will be called ptp_qoriq.
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config PTP_1588_CLOCK_IXP46X
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tristate "Intel IXP46x as PTP clock"
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--- a/drivers/soc/Kconfig
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+++ b/drivers/soc/Kconfig
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@@ -5,6 +5,7 @@ source "drivers/soc/amlogic/Kconfig"
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source "drivers/soc/atmel/Kconfig"
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source "drivers/soc/bcm/Kconfig"
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source "drivers/soc/fsl/Kconfig"
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+source "drivers/soc/fsl/ls2-console/Kconfig"
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source "drivers/soc/imx/Kconfig"
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source "drivers/soc/mediatek/Kconfig"
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source "drivers/soc/qcom/Kconfig"
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--- a/drivers/soc/fsl/Kconfig
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+++ b/drivers/soc/fsl/Kconfig
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@@ -16,3 +16,25 @@ config FSL_GUTS
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Initially only reading SVR and registering soc device are supported.
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Other guts accesses, such as reading RCW, should eventually be moved
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into this driver as well.
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+
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+config FSL_QIXIS
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+ tristate "QIXIS system controller driver"
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+ depends on OF
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+ select REGMAP_I2C
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+ select REGMAP_MMIO
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+ select MFD_CORE
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+ default n
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+ help
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+ Say y here to enable QIXIS system controller api. The qixis driver
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+ provides FPGA functions to control system.
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+
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+config FSL_SLEEP_FSM
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+ bool
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+ help
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+ This driver configures a hardware FSM (Finite State Machine) for deep sleep.
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+ The FSM is used to finish clean-ups at the last stage of system entering deep
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+ sleep, and also wakes up system when a wake up event happens.
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+
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+if ARM || ARM64
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+source "drivers/soc/fsl/Kconfig.arm"
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+endif
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--- /dev/null
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+++ b/drivers/soc/fsl/Kconfig.arm
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@@ -0,0 +1,16 @@
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+#
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+# Freescale ARM SOC Drivers
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+#
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+
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+config LS_SOC_DRIVERS
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+ bool "Layerscape Soc Drivers"
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+ depends on ARCH_LAYERSCAPE || SOC_LS1021A
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+ default n
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+ help
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+ Say y here to enable Freescale Layerscape Soc Device Drivers support.
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+ The Soc Drivers provides the device driver that is a specific block
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+ or feature on Layerscape platform.
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+
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+if LS_SOC_DRIVERS
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+ source "drivers/soc/fsl/layerscape/Kconfig"
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+endif
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--- a/drivers/soc/fsl/Makefile
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+++ b/drivers/soc/fsl/Makefile
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@@ -5,4 +5,9 @@
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obj-$(CONFIG_FSL_DPAA) += qbman/
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obj-$(CONFIG_QUICC_ENGINE) += qe/
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obj-$(CONFIG_CPM) += qe/
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+obj-$(CONFIG_FSL_QIXIS) += qixis_ctrl.o
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obj-$(CONFIG_FSL_GUTS) += guts.o
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+obj-$(CONFIG_FSL_LS2_CONSOLE) += ls2-console/
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+obj-$(CONFIG_SUSPEND) += rcpm.o
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+obj-$(CONFIG_LS_SOC_DRIVERS) += layerscape/
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+obj-$(CONFIG_FSL_SLEEP_FSM) += sleep_fsm.o
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--- /dev/null
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+++ b/drivers/soc/fsl/layerscape/Kconfig
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@@ -0,0 +1,10 @@
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+#
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+# Layerscape Soc drivers
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+#
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+config FTM_ALARM
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+ bool "FTM alarm driver"
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+ default n
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+ help
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+ Say y here to enable FTM alarm support. The FTM alarm provides
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+ alarm functions for wakeup system from deep sleep. There is only
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+ one FTM can be used in ALARM(FTM 0).
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--- /dev/null
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+++ b/drivers/soc/fsl/layerscape/Makefile
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@@ -0,0 +1 @@
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+obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o
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--- a/drivers/staging/Kconfig
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+++ b/drivers/staging/Kconfig
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@@ -118,4 +118,8 @@ source "drivers/staging/vboxvideo/Kconfi
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source "drivers/staging/pi433/Kconfig"
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+source "drivers/staging/fsl_qbman/Kconfig"
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+
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+source "drivers/staging/fsl_ppfe/Kconfig"
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+
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endif # STAGING
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--- a/drivers/staging/Makefile
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+++ b/drivers/staging/Makefile
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@@ -50,3 +50,5 @@ obj-$(CONFIG_BCM2835_VCHIQ) += vc04_serv
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obj-$(CONFIG_CRYPTO_DEV_CCREE) += ccree/
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obj-$(CONFIG_DRM_VBOXVIDEO) += vboxvideo/
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obj-$(CONFIG_PI433) += pi433/
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+obj-$(CONFIG_FSL_SDK_DPA) += fsl_qbman/
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+obj-$(CONFIG_FSL_PPFE) += fsl_ppfe/
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--- a/drivers/staging/fsl-dpaa2/Kconfig
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+++ b/drivers/staging/fsl-dpaa2/Kconfig
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@@ -4,7 +4,7 @@
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config FSL_DPAA2
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bool "Freescale DPAA2 devices"
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- depends on FSL_MC_BUS && ARCH_LAYERSCAPE
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+ depends on FSL_MC_BUS
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---help---
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Build drivers for Freescale DataPath Acceleration
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Architecture (DPAA2) family of SoCs.
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@@ -16,3 +16,57 @@ config FSL_DPAA2_ETH
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---help---
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Ethernet driver for Freescale DPAA2 SoCs, using the
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Freescale MC bus driver
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+
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+if FSL_DPAA2_ETH
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+config FSL_DPAA2_ETH_USE_ERR_QUEUE
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+ bool "Enable Rx error queue"
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+ default n
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+ ---help---
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+ Allow Rx error frames to be enqueued on an error queue
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+ and processed by the driver (by default they are dropped
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+ in hardware).
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+ This may impact performance, recommended for debugging
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+ purposes only.
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+
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+# QBMAN_DEBUG requires some additional DPIO APIs
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+config FSL_DPAA2_ETH_DEBUGFS
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+ depends on DEBUG_FS
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+ bool "Enable debugfs support"
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+ default y
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+ ---help---
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+ Enable advanced statistics through debugfs interface.
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+
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+config FSL_DPAA2_ETH_DCB
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+ bool "Data Center Bridging (DCB) Support"
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+ default n
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+ depends on DCB
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+ ---help---
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+ Say Y here if you want to use Data Center Bridging (DCB) features
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+ (PFC) in the driver.
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+
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+ If unsure, say N.
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+
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+config FSL_DPAA2_PTP_CLOCK
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+ tristate "Freescale DPAA2 as PTP clock"
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+ select PTP_1588_CLOCK
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+ default y
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+ help
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+ This driver adds support for using the DPAA2 1588 timer module
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+ as a PTP clock. This clock is only useful if your PTP programs are
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+ getting hardware time stamps on the PTP Ethernet packets
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+ using the SO_TIMESTAMPING API.
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+
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+ To compile this driver as a module, choose M here: the module
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+ will be called dpaa2-rtc.
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+endif
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+
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+source "drivers/staging/fsl-dpaa2/mac/Kconfig"
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+source "drivers/staging/fsl-dpaa2/evb/Kconfig"
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+
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+config FSL_DPAA2_ETHSW
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+ tristate "Freescale DPAA2 Ethernet Switch"
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+ depends on FSL_DPAA2
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+ depends on NET_SWITCHDEV
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+ ---help---
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+ Driver for Freescale DPAA2 Ethernet Switch. Select
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+ BRIDGE to have support for bridge tools.
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--- a/drivers/staging/fsl-dpaa2/Makefile
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+++ b/drivers/staging/fsl-dpaa2/Makefile
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@@ -3,3 +3,7 @@
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#
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obj-$(CONFIG_FSL_DPAA2_ETH) += ethernet/
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+obj-$(CONFIG_FSL_DPAA2_MAC) += mac/
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+obj-$(CONFIG_FSL_DPAA2_EVB) += evb/
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+obj-$(CONFIG_FSL_DPAA2_PTP_CLOCK) += rtc/
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+obj-$(CONFIG_FSL_DPAA2_ETHSW) += ethsw/
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