mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
7bbf4117c6
This add support for kernel 4.9 to the ar71xx target. It was compile tested with the generic, NAND and mikrotik subtarget. Multiple members of the community tested it on their boards and did not report any major problem so far. Especially the NAND part received some changes to adapt to the new kernel APIs. The serial driver hack used for the Arduino Yun was not ported because the kernel changed there a lot. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
104 lines
3.2 KiB
Diff
104 lines
3.2 KiB
Diff
--- a/drivers/usb/host/ehci-hcd.c
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+++ b/drivers/usb/host/ehci-hcd.c
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@@ -252,6 +252,37 @@ int ehci_reset(struct ehci_hcd *ehci)
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command |= CMD_RESET;
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dbg_cmd (ehci, "reset", command);
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ehci_writel(ehci, command, &ehci->regs->command);
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+
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+ if (ehci->qca_force_host_mode) {
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+ u32 usbmode;
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+
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+ udelay(1000);
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+
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+ usbmode = ehci_readl(ehci, &ehci->regs->usbmode);
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+ usbmode |= USBMODE_CM_HC | (1 << 4);
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+ ehci_writel(ehci, usbmode, &ehci->regs->usbmode);
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+
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+ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n",
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+ ehci_readl(ehci, &ehci->regs->usbmode));
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+ }
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+
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+ if (ehci->qca_force_16bit_ptw) {
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+ u32 port_status;
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+
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+ udelay(1000);
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+
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+ /* enable 16-bit UTMI interface */
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+ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]);
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+ port_status |= BIT(28);
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+ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]);
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+
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+ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n",
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+ ehci_readl(ehci, &ehci->regs->port_status[0]));
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+ }
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+
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+ if (ehci->reset_notifier)
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+ ehci->reset_notifier(ehci_to_hcd(ehci));
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+
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ehci->rh_state = EHCI_RH_HALTED;
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ehci->next_statechange = jiffies;
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retval = ehci_handshake(ehci, &ehci->regs->command,
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--- a/drivers/usb/host/ehci.h
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+++ b/drivers/usb/host/ehci.h
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@@ -231,6 +231,10 @@ struct ehci_hcd { /* one per controlle
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unsigned need_oc_pp_cycle:1; /* MPC834X port power */
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unsigned imx28_write_fix:1; /* For Freescale i.MX28 */
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unsigned ignore_oc:1;
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+ unsigned qca_force_host_mode:1;
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+ unsigned qca_force_16bit_ptw:1; /* force 16 bit UTMI */
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+
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+ void (*reset_notifier)(struct usb_hcd *hcd);
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/* required for usb32 quirk */
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#define OHCI_CTRL_HCFS (3 << 6)
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--- a/include/linux/usb/ehci_pdriver.h
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+++ b/include/linux/usb/ehci_pdriver.h
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@@ -50,6 +50,8 @@ struct usb_ehci_pdata {
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unsigned reset_on_resume:1;
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unsigned dma_mask_64:1;
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unsigned ignore_oc:1;
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+ unsigned qca_force_host_mode:1;
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+ unsigned qca_force_16bit_ptw:1;
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/* Turn on all power and clocks */
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int (*power_on)(struct platform_device *pdev);
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@@ -59,6 +61,7 @@ struct usb_ehci_pdata {
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* turn off everything else */
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void (*power_suspend)(struct platform_device *pdev);
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int (*pre_setup)(struct usb_hcd *hcd);
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+ void (*reset_notifier)(struct platform_device *pdev);
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};
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#endif /* __USB_CORE_EHCI_PDRIVER_H */
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--- a/drivers/usb/host/ehci-platform.c
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+++ b/drivers/usb/host/ehci-platform.c
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@@ -52,6 +52,14 @@ struct ehci_platform_priv {
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static const char hcd_name[] = "ehci-platform";
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+static void ehci_platform_reset_notifier(struct usb_hcd *hcd)
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+{
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+ struct platform_device *pdev = to_platform_device(hcd->self.controller);
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+ struct usb_ehci_pdata *pdata = pdev->dev.platform_data;
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+
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+ pdata->reset_notifier(pdev);
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+}
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+
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static int ehci_platform_reset(struct usb_hcd *hcd)
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{
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struct platform_device *pdev = to_platform_device(hcd->self.controller);
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@@ -261,6 +269,13 @@ static int ehci_platform_probe(struct pl
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priv->reset_on_resume = true;
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if (pdata->ignore_oc)
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ehci->ignore_oc = 1;
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+ if (pdata->qca_force_host_mode)
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+ ehci->qca_force_host_mode = 1;
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+ if (pdata->qca_force_16bit_ptw)
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+ ehci->qca_force_16bit_ptw = 1;
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+
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+ if (pdata->reset_notifier)
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+ ehci->reset_notifier = ehci_platform_reset_notifier;
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#ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
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if (ehci->big_endian_mmio) {
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