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71810eb068
The Realtek timer node for RTL930x doesn't have any child nodes, making
the use of '#address-cells' quite pointless. It is also not an interrupt
controller, meaning it makes no sense to define '#interrupt-cells'.
The I/O address for this node is also wrong, but this is hidden by the
fact that the driver associated with this node bypasses the usual DT
machinery and does it's own thing. Correct the address to have a sane
value, even though it isn't actually used.
Fixes: a75b9e3ecb ("realtek: Adding RTL930X sub-target")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
161 lines
2.8 KiB
Plaintext
161 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "realtek,rtl838x-soc";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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frequency = <800000000>;
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cpu@0 {
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compatible = "mips,mips34Kc";
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reg = <0>;
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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cpuintc: cpuintc {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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lx_clk: lx_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <175000000>;
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};
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soc: soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x18000000 0x10000>;
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intc: interrupt-controller@3000 {
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compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
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reg = <0x3000 0x18>, <0x3018 0x18>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
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};
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rtl9300clock: rtl9300clock@3200 {
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compatible = "realtek,rtl9300clock";
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reg = <0x3200 0x10>;
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interrupt-parent = <&intc>;
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interrupts = <7 5>, <8 5>;
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};
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spi0: spi@1200 {
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compatible = "realtek,rtl8380-spi";
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reg = <0x1200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: uart@2000 {
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compatible = "ns16550a";
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reg = <0x2000 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <30 1>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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};
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uart1: uart@2100 {
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compatible = "ns16550a";
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reg = <0x2100 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <31 0>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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watchdog0: watchdog@3260 {
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compatible = "realtek,rtl9300-wdt";
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reg = <0x3260 0xc>;
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realtek,reset-mode = "soc";
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clocks = <&lx_clk>;
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timeout-sec = <30>;
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interrupt-parent = <&intc>;
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interrupt-names = "phase1", "phase2";
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interrupts = <5 4>, <6 4>;
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};
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gpio0: gpio-controller@3300 {
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compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
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reg = <0x3300 0x1c>, <0x3338 0x8>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <13 1>;
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};
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};
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ethernet0: ethernet@1b00a300 {
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compatible = "realtek,rtl838x-eth";
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reg = <0x1b00a300 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <24 3>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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switch0: switch@1b000000 {
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compatible = "realtek,rtl83xx-switch";
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status = "okay";
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interrupt-parent = <&intc>;
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interrupts = <23 2>;
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};
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};
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