openwrt/target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
Shiji Yang f0b2fdb82e ath79: improve support for D-Link DIR-8x9 A1 series
1. Remove unnecessary new lines in the dts.
2. Remove duplicate included file "gpio.h" in the device dts.
3. Add missing button labels "reset" and "wps".
4. Unify the format of the reg properties.
5. Add u-boot environment support.
6. Reduce spi clock frequency since the max value suggested by the
   chip datasheet is only 25 MHz.
7. Add seama header fixup for DIR-859 A1. Without this header fixup,
   u-boot checksum for kernel will fail after the first boot.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
(cherry picked from commit e5d8739aa8)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-05-24 19:25:52 +01:00

41 lines
720 B
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9563_dlink_dir-8x9-a1.dtsi"
/ {
model = "D-Link DIR-859 A1";
compatible = "dlink,dir-859-a1", "qca,qca9563";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wps {
label = "green:wps";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "green:power";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
internet {
label = "green:internet";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wlan {
label = "green:wlan";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};