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Siflower SF19A2890 is an SoC with: Dual-core MIPS InterAptiv at 800MHz DDR3 controller One Gigabit Ethernet MAC with RGMII and IPv4 HNAT engine Built-in 2x2 11N + 2x2 11AC WiFi radio USB 2.0 OTG I2C/SPI/GPIO and various other peripherals This PR adds support for SF19A2890 EVB with ethernet support. EVB spec: Memory: DDR3 128M Ethernet: RTL8367RB 5-port gigabit switch Flash: 16M NOR Others: MicroUSB OTG, LED x 1, Reset button x1 The built image can be flashed using u-boot recovery. This target is marked as source-only until support for a commercial router board comes. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
68 lines
2.1 KiB
Diff
68 lines
2.1 KiB
Diff
From 0b04c37a1aae523025195c29a6477cf26234d26c Mon Sep 17 00:00:00 2001
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From: Chuanhong Guo <gch981213@gmail.com>
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Date: Tue, 10 Sep 2024 09:10:27 +0800
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Subject: [PATCH 9/9] usb: dwc2: handle OTG interrupt regardless of GINTSTS
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The DWC OTG 3.30a found on Siflower SF19A2890 has battery charger
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support enabled. It triggers MultVallpChng interrupt (bit 20 of
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GOTGINT) but doesn't set OTGInt in GINTSTS. As a result, this
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interrupt is never handled, and linux disables USB interrupt
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because "nobody cares".
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Handle OTG interrupt in IRQ handler regardless of whether the
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OTGInt bit in GINTSTS is set or not.
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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---
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drivers/usb/dwc2/core_intr.c | 11 ++++++++---
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1 file changed, 8 insertions(+), 3 deletions(-)
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--- a/drivers/usb/dwc2/core_intr.c
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+++ b/drivers/usb/dwc2/core_intr.c
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@@ -79,7 +79,7 @@ static void dwc2_handle_mode_mismatch_in
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*
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* @hsotg: Programming view of DWC_otg controller
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*/
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-static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
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+static irqreturn_t dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
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{
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u32 gotgint;
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u32 gotgctl;
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@@ -87,6 +87,10 @@ static void dwc2_handle_otg_intr(struct
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gotgint = dwc2_readl(hsotg, GOTGINT);
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gotgctl = dwc2_readl(hsotg, GOTGCTL);
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+
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+ if (!gotgint)
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+ return IRQ_NONE;
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+
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dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
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dwc2_op_state_str(hsotg));
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@@ -229,6 +233,7 @@ static void dwc2_handle_otg_intr(struct
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/* Clear GOTGINT */
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dwc2_writel(hsotg, gotgint, GOTGINT);
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+ return IRQ_HANDLED;
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}
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/**
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@@ -842,6 +847,8 @@ irqreturn_t dwc2_handle_common_intr(int
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hsotg->frame_number = (dwc2_readl(hsotg, HFNUM)
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& HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT;
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+ retval = dwc2_handle_otg_intr(hsotg);
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+
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gintsts = dwc2_read_common_intr(hsotg);
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if (gintsts & ~GINTSTS_PRTINT)
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retval = IRQ_HANDLED;
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@@ -855,8 +862,6 @@ irqreturn_t dwc2_handle_common_intr(int
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if (gintsts & GINTSTS_MODEMIS)
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dwc2_handle_mode_mismatch_intr(hsotg);
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- if (gintsts & GINTSTS_OTGINT)
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- dwc2_handle_otg_intr(hsotg);
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if (gintsts & GINTSTS_CONIDSTSCHNG)
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dwc2_handle_conn_id_status_change_intr(hsotg);
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if (gintsts & GINTSTS_DISCONNINT)
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