openwrt/target/linux/ath79/dts/qca9531_comfast_cf-e314n-v2.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qca953x.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "comfast,cf-e314n-v2", "qca,qca9531";
	model = "COMFAST CF-E314N v2";

	aliases {
		serial0 = &uart;
		led-boot = &led_rssihigh;
		led-failsafe = &led_rssihigh;
		led-upgrade = &led_rssihigh;
	};

	leds {
		compatible = "gpio-leds";

		pinctrl-names = "default";
		pinctrl-0 = <&jtag_disable_pins &led_rssilow_pin &led_rssimediumhigh_pin &led_rssihigh_pin>;

		wan {
			label = "green:wan";
			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
		};

		lan {
			label = "green:lan";
			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
		};

		rssilow {
			label = "red:rssilow";
			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
		};

		rssimediumlow {
			label = "red:rssimediumlow";
			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
		};

		rssimediumhigh {
			label = "green:rssimediumhigh";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};

		led_rssihigh: rssihigh {
			label = "green:rssihigh";
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
		};

		wlan {
			label = "green:wlan";
			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};
};

&pinmux {
	led_rssilow_pin: pinmux_rssilow_pin {
		pinctrl-single,bits = <0x8 0x0 0xff000000>;
	};

	led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin {
		pinctrl-single,bits = <0xc 0x0 0x00ff0000>;
	};

	led_rssihigh_pin: pinmux_rssihigh_pin {
		pinctrl-single,bits = <0x10 0x0 0x000000ff>;
	};
};

&spi {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x000000 0x010000>;
				read-only;
			};

			art: partition@10000 {
				label = "art";
				reg = <0x010000 0x010000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_art_0: macaddr@0 {
						reg = <0x0 0x6>;
					};

					macaddr_art_6: macaddr@6 {
						reg = <0x6 0x6>;
					};
				};
			};

			partition@20000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x020000 0x7c0000>;
			};

			partition@7e0000 {
				label = "configs";
				reg = <0x7e0000 0x010000>;
				read-only;
			};

			partition@7f0000 {
				label = "nvram";
				reg = <0x7f0000 0x010000>;
				read-only;
			};
		};
	};
};

&eth0 {
	status = "okay";

	phy-handle = <&swphy4>;

	nvmem-cells = <&macaddr_art_0>;
	nvmem-cell-names = "mac-address";
};

&eth1 {
	nvmem-cells = <&macaddr_art_6>;
	nvmem-cell-names = "mac-address";
};

&wmac {
	status = "okay";
	mtd-cal-data = <&art 0x1000>;
};