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397 lines
9.0 KiB
C
397 lines
9.0 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2006, 2007 OpenWrt.org
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/ar7/vlynq.h>
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#define VLYNQ_PCI_SLOTS 2
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struct vlynq_reg_config {
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u32 offset;
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u32 value;
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};
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struct vlynq_pci_config {
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u32 chip_id;
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char name[32];
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struct vlynq_mapping rx_mapping[4];
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int irq;
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int irq_type;
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u32 chip;
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u32 class;
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int num_regs;
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struct vlynq_reg_config regs[10];
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};
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struct vlynq_pci_private {
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u32 latency;
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u32 cache_line;
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u32 command;
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u32 sz_mask;
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struct vlynq_pci_config *config;
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};
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static struct vlynq_pci_config known_devices[] = {
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{
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.chip_id = 0x00000009, .name = "TI ACX111",
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.rx_mapping = {
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{ .size = 0x22000, .offset = 0xf0000000 },
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{ .size = 0x40000, .offset = 0xc0000000 },
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{ .size = 0x0, .offset = 0x0 },
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{ .size = 0x0, .offset = 0x0 },
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},
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.irq = 0, .chip = 0x9066104c,
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.class = PCI_CLASS_NETWORK_OTHER,
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.num_regs = 5,
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.regs = {
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{ .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
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{ .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
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{ .offset = 0x740, .value = 0 },
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{ .offset = 0x744, .value = 0x00010000 },
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{ .offset = 0x764, .value = 0x00010000 },
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},
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},
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};
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static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
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static struct resource vlynq_io_resource = {
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.start = 0x00000000,
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.end = 0x00000000,
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.name = "pci IO space",
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.flags = IORESOURCE_IO
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};
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static struct resource vlynq_mem_resource = {
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.start = 0x00000000,
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.end = 0x00000000,
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.name = "pci memory space",
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.flags = IORESOURCE_MEM
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};
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static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
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{
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int i;
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struct vlynq_pci_private *priv = dev->priv;
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u32 ret = dev->mem_start;
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if (!priv->config->rx_mapping[res].size) return 0;
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for (i = 0; i < res; i++)
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ret += priv->config->rx_mapping[i].size;
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return ret;
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}
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static inline u32 vlynq_read(u32 val, int size) {
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switch (size) {
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case 1:
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return *(u8 *)&val;
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case 2:
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return *(u16 *)&val;
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}
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return val;
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}
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static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
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{
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struct vlynq_device *dev;
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struct vlynq_pci_private *priv;
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int resno, slot = PCI_SLOT(devfn);
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (slot >= VLYNQ_PCI_SLOTS)
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return PCIBIOS_DEVICE_NOT_FOUND;
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dev = slots[slot];
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if (!dev || (PCI_FUNC(devfn) > 0))
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return PCIBIOS_DEVICE_NOT_FOUND;
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priv = dev->priv;
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switch (where) {
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case PCI_VENDOR_ID:
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*val = vlynq_read(priv->config->chip, size);
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break;
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case PCI_DEVICE_ID:
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*val = priv->config->chip & 0xffff;
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case PCI_COMMAND:
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*val = priv->command;
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case PCI_STATUS:
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/* *val = PCI_STATUS_CAP_LIST;*/
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*val = 0;
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break;
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case PCI_CLASS_REVISION:
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*val = priv->config->class;
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break;
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case PCI_LATENCY_TIMER:
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*val = priv->latency;
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break;
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case PCI_HEADER_TYPE:
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*val = PCI_HEADER_TYPE_NORMAL;
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break;
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case PCI_CACHE_LINE_SIZE:
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*val = priv->cache_line;
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break;
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case PCI_BASE_ADDRESS_0:
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case PCI_BASE_ADDRESS_1:
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case PCI_BASE_ADDRESS_2:
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case PCI_BASE_ADDRESS_3:
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resno = (where - PCI_BASE_ADDRESS_0) >> 2;
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if (priv->sz_mask & (1 << resno)) {
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priv->sz_mask &= ~(1 << resno);
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*val = priv->config->rx_mapping[resno].size;
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} else {
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*val = vlynq_get_mapped(dev, resno);
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}
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break;
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case PCI_BASE_ADDRESS_4:
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case PCI_BASE_ADDRESS_5:
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case PCI_SUBSYSTEM_VENDOR_ID:
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case PCI_SUBSYSTEM_ID:
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case PCI_ROM_ADDRESS:
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case PCI_INTERRUPT_LINE:
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case PCI_CARDBUS_CIS:
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case PCI_CAPABILITY_LIST:
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case PCI_INTERRUPT_PIN:
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*val = 0;
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break;
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default:
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printk("%s: Read of unknown register 0x%x (size %d)\n",
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dev->dev.bus_id, where, size);
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
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{
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struct vlynq_device *dev;
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struct vlynq_pci_private *priv;
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int resno, slot = PCI_SLOT(devfn);
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (slot >= VLYNQ_PCI_SLOTS)
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return PCIBIOS_DEVICE_NOT_FOUND;
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dev = slots[slot];
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if (!dev || (PCI_FUNC(devfn) > 0))
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return PCIBIOS_DEVICE_NOT_FOUND;
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priv = dev->priv;
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switch (where) {
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case PCI_VENDOR_ID:
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case PCI_DEVICE_ID:
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case PCI_STATUS:
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case PCI_CLASS_REVISION:
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case PCI_HEADER_TYPE:
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case PCI_CACHE_LINE_SIZE:
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case PCI_SUBSYSTEM_VENDOR_ID:
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case PCI_SUBSYSTEM_ID:
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case PCI_INTERRUPT_LINE:
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case PCI_INTERRUPT_PIN:
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case PCI_CARDBUS_CIS:
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case PCI_CAPABILITY_LIST:
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return PCIBIOS_FUNC_NOT_SUPPORTED;
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case PCI_COMMAND:
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priv->command = val;
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case PCI_LATENCY_TIMER:
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priv->latency = val;
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break;
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case PCI_BASE_ADDRESS_0:
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case PCI_BASE_ADDRESS_1:
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case PCI_BASE_ADDRESS_2:
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case PCI_BASE_ADDRESS_3:
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if (val == 0xffffffff) {
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resno = (where - PCI_BASE_ADDRESS_0) >> 2;
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priv->sz_mask |= (1 << resno);
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break;
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}
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case PCI_BASE_ADDRESS_4:
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case PCI_BASE_ADDRESS_5:
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case PCI_ROM_ADDRESS:
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break;
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default:
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printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
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dev->dev.bus_id, where, size, val);
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static struct pci_ops vlynq_pci_ops = {
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vlynq_config_read,
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vlynq_config_write
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};
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static struct pci_controller vlynq_controller = {
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.pci_ops = &vlynq_pci_ops,
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.io_resource = &vlynq_io_resource,
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.mem_resource = &vlynq_mem_resource,
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};
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static int vlynq_pci_probe(struct vlynq_device *dev)
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{
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int result, i;
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u32 chip_id, addr;
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struct vlynq_pci_private *priv;
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struct vlynq_mapping mapping[4] = { { 0, }, };
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struct vlynq_pci_config *config = NULL;
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result = vlynq_set_local_irq(dev, 31);
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if (result)
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return result;
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result = vlynq_set_remote_irq(dev, 30);
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if (result)
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return result;
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result = vlynq_device_enable(dev);
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if (result)
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return result;
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chip_id = vlynq_remote_id(dev);
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for (i = 0; i < ARRAY_SIZE(known_devices); i++)
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if (chip_id == known_devices[i].chip_id)
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config = &known_devices[i];
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if (!config) {
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printk("vlynq-pci: skipping unknown device "
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"%04x:%04x at %s\n", chip_id >> 16,
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chip_id & 0xffff, dev->dev.bus_id);
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result = -ENODEV;
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goto fail;
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}
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printk("vlynq-pci: attaching device %s at %s\n",
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config->name, dev->dev.bus_id);
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priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL);
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if (!priv) {
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printk(KERN_ERR "%s: failed to allocate private data\n",
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dev->dev.bus_id);
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result = -ENOMEM;
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goto fail;
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}
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memset(priv, 0, sizeof(struct vlynq_pci_private));
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priv->latency = 64;
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priv->cache_line = 32;
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priv->config = config;
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mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
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mapping[0].size = 0x02000000;
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vlynq_set_local_mapping(dev, dev->mem_start, mapping);
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vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
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addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
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if (!addr) {
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printk(KERN_ERR "%s: failed to remap io memory\n",
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dev->dev.bus_id);
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result = -ENXIO;
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goto fail;
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}
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for (i = 0; i < config->num_regs; i++)
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*(volatile u32 *)(addr + config->regs[i].offset) =
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config->regs[i].value;
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dev->priv = priv;
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for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
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if (!slots[i]) {
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slots[i] = dev;
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break;
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}
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}
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return 0;
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fail:
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vlynq_device_disable(dev);
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return result;
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}
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static int vlynq_pci_remove(struct vlynq_device *dev)
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{
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int i;
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struct vlynq_pci_private *priv = dev->priv;
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for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
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if (slots[i] == dev)
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slots[i] = NULL;
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vlynq_device_disable(dev);
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kfree(priv);
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return 0;
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}
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static struct vlynq_driver vlynq_pci = {
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.name = "PCI over VLYNQ emulation",
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.probe = vlynq_pci_probe,
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.remove = vlynq_pci_remove,
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};
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int vlynq_pci_init(void)
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{
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int res;
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res = vlynq_register_driver(&vlynq_pci);
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if (res)
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return res;
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register_pci_controller(&vlynq_controller);
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return 0;
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}
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int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
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{
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struct vlynq_device *dev;
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struct vlynq_pci_private *priv;
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dev = slots[slot];
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if (!dev)
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return 0;
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priv = dev->priv;
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return vlynq_virq_to_irq(dev, priv->config->irq);
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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