mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
c98819a9e6
The "/dts-v1/;" identifier is supposed to be present once at the top of a device tree file after the includes have been processed. Like done for other targets recently, put the dts-v1 statement into the top-level SoC-based DTSI files, and remove all other occurences. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
206 lines
3.9 KiB
Plaintext
206 lines
3.9 KiB
Plaintext
/dts-v1/;
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "brcm,bcm6358";
|
|
|
|
aliases {
|
|
pflash = &pflash;
|
|
pinctrl = &pinctrl;
|
|
serial0 = &uart0;
|
|
serial1 = &uart1;
|
|
spi0 = &lsspi;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
|
device_type = "cpu";
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
cpu_intc: interrupt-controller {
|
|
#address-cells = <0>;
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
memory { device_type = "memory"; reg = <0 0>; };
|
|
|
|
pflash: nor@1e000000 {
|
|
compatible = "cfi-flash";
|
|
reg = <0x1e000000 0x2000000>;
|
|
bank-width = <2>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
ubus@fff00000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
compatible = "simple-bus";
|
|
interrupt-parent = <&periph_intc>;
|
|
|
|
periph_intc: interrupt-controller@fffe000c {
|
|
compatible = "brcm,bcm6345-l1-intc";
|
|
reg = <0xfffe000c 0x8>,
|
|
<0xfffe0038 0x8>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&cpu_intc>;
|
|
interrupts = <2>, <3>;
|
|
};
|
|
|
|
ext_intc0: interrupt-controller@fffe0014 {
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
reg = <0xfffe0014 0x4>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupts = <25>, <26>, <27>, <28>;
|
|
};
|
|
|
|
ext_intc1: interrupt-controller@fffe001c {
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
reg = <0xfffe001c 0x4>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
interrupts = <20>, <21>;
|
|
};
|
|
|
|
pinctrl: pin-controller@fffe0080 {
|
|
compatible = "brcm,bcm6358-pinctrl";
|
|
reg = <0xfffe0080 0x8>,
|
|
<0xfffe0088 0x8>;
|
|
reg-names = "dirout", "dat", "mode";
|
|
brcm,gpiomode = <&gpiomode>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
interrupts-extended = <&ext_intc1 0 0>,
|
|
<&ext_intc1 1 0>,
|
|
<&ext_intc0 0 0>,
|
|
<&ext_intc0 1 0>,
|
|
<&ext_intc0 2 0>,
|
|
<&ext_intc0 3 0>;
|
|
interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
|
|
"gpio36", "gpio37";
|
|
|
|
pinctrl_ebi_cs: ebi_cs {
|
|
function = "ebi_cs";
|
|
groups = "ebi_cs_grp";
|
|
};
|
|
|
|
pinctrl_uart1: uart1 {
|
|
function = "uart1";
|
|
groups = "uart1_grp";
|
|
};
|
|
|
|
pinctrl_serial_led: serial_led {
|
|
function = "serial_led";
|
|
groups = "serial_led_grp";
|
|
};
|
|
|
|
pinctrl_legacy_led: legacy_led {
|
|
function = "legacy_led";
|
|
groups = "legacy_led_grp";
|
|
};
|
|
|
|
pinctrl_led: led {
|
|
function = "led";
|
|
groups = "led_grp";
|
|
};
|
|
|
|
pinctrl_spi_cs_23: spi_cs {
|
|
function = "spi_cs";
|
|
groups = "spi_cs_grp";
|
|
};
|
|
|
|
pinctrl_utopia: utopia {
|
|
function = "utopia";
|
|
groups = "utopia_grp";
|
|
};
|
|
|
|
pinctrl_pwm_syn_clk: pwm_syn_clk {
|
|
function = "pwm_syn_clk";
|
|
groups = "pwm_syn_clk_grp";
|
|
};
|
|
|
|
pinctrl_sys_irq: sys_irq {
|
|
function = "sys_irq";
|
|
groups = "sys_irq_grp";
|
|
};
|
|
};
|
|
|
|
gpiomode: gpiomode@fffe0098 {
|
|
compatible = "brcm,bcm6358-gpiomode", "syscon";
|
|
reg = <0xfffe0098 0x4>;
|
|
};
|
|
|
|
leds: led-controller@fffe00d0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6358-leds";
|
|
reg = <0xfffe00d0 0x8>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart0: serial@fffe0100 {
|
|
compatible = "brcm,bcm6345-uart";
|
|
reg = <0xfffe0100 0x18>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <2>;
|
|
|
|
/* clocks = <&periph_clk>; */
|
|
/* clock-names = "refclk"; */
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@fffe0120 {
|
|
compatible = "brcm,bcm6345-uart";
|
|
reg = <0xfffe0120 0x18>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <3>;
|
|
|
|
/* clocks = <&periph_clk>; */
|
|
/* clock-names = "refclk"; */
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
lsspi: spi@fffe0800 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm6358-spi";
|
|
reg = <0xfffe0800 0x70c>;
|
|
interrupts = <1>;
|
|
/* clocks = <&clkctl 9>; */
|
|
};
|
|
};
|
|
};
|