openwrt/target/linux/ramips/dts/mt7621_unielec_u7621-01.dtsi
David Bentham e61d651053 ramips: correct the PCIe port number for Unielec u7621-01
MT7621 gets a new PCIe driver in the 5.15+ kernel. Allocating wrong PCIe
port will cause the PCIe NIC to not work properly. This commit fixes
the wrong port numbers on Unielec u7621-01.

According to the bootlog, MT7612E (5 GHz) is connected to pcie2, and
MT7603E (2 GHz) is connected to pcie1:

[    1.294844] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
[    1.308635] mt7621-pci 1e140000.pcie: PCIE1 enabled
[    1.318277] mt7621-pci 1e140000.pcie: PCIE2 enabled

Also correct the led activity for the MT7603e - not used on the MT7612e

Signed-off-by: David Bentham <db260179@gmail.com>
(cherry picked from commit 39e55bdbe2)
Signed-off-by: David Bentham <db260179@gmail.com>
2024-01-06 13:01:34 +00:00

116 lines
1.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "unielec,u7621-01", "mediatek,mt7621-soc";
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
modem_reset {
gpio-export,name = "modem_reset";
gpio-export,output = <1>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_status: status {
label = "green:status";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
};
};
&pcie {
status = "okay";
};
&pcie1 { // MT7603EN
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
led {
led-active-low;
};
};
};
&pcie2 { // MT7612E
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy0>;
};
&mdio {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "lan1";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan3";
};
port@4 {
status = "okay";
label = "lan4";
};
};
};
&state_default {
gpio {
groups = "jtag", "uart2", "wdt";
function = "gpio";
};
};