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cc733e7e2a
The upstream mtk-sd driver did not perform specific timing optimization for MT762x series SoC, hence the SDHC peripheral of some boards cannot run at too high frequency. Reduce the maximum clock frequency to fix the mmc read/write error. Closes: https://github.com/openwrt/openwrt/issues/17364 Signed-off-by: Shiji Yang <yangshiji66@qq.com> Link: https://github.com/openwrt/openwrt/pull/17375 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> (cherry picked from commit de0c143742517d401c4730137f092be8fb7e882a)
116 lines
1.8 KiB
Plaintext
116 lines
1.8 KiB
Plaintext
#include "mt7620a_hiwifi_hc5x61.dtsi"
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/ {
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compatible = "hiwifi,hc5861", "hiwifi,hc5x61", "ralink,mt7620a-soc";
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model = "HiWiFi HC5861";
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aliases {
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led-boot = &led_system;
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led-failsafe = &led_system;
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led-running = &led_system;
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led-upgrade = &led_system;
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};
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leds {
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compatible = "gpio-leds";
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led_system: system {
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label = "blue:system";
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gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
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};
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wlan2g {
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label = "blue:wlan2g";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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internet {
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label = "blue:internet";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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wlan5g {
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label = "blue:wlan5g";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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turbo {
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label = "blue:turbo";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usbpower {
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gpio-export,name = "usbpower";
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gpio-export,output = <0>;
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
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mediatek,portmap = "llllw";
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&gsw {
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mediatek,ephy-base = /bits/ 8 <12>;
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};
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&mmc_reg_3v3 {
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/delete-property/ enable-active-high;
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "pci14c3,7662";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&wmac {
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pinctrl-names = "default", "pa_gpio";
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pinctrl-0 = <&pa_pins>;
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pinctrl-1 = <&pa_gpio_pins>;
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};
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