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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
110 lines
1.6 KiB
Plaintext
110 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rt3883.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "ralink,rt3883-soc";
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rtl8367b {
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compatible = "realtek,rtl8367b";
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gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
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};
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};
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&gpio1 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "uboot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x7a0000>;
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};
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partition@7f0000 {
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label = "user-cfg";
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reg = <0x7f0000 0x10000>;
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read-only;
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};
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};
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};
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};
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ðernet {
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port@0 {
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mediatek,fixed-link = <1000 1 1 1>;
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phy-mode = "rgmii";
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};
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};
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&state_default {
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gpio {
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ralink,group = "i2c", "jtag", "uartf";
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ralink,function = "gpio";
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};
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};
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&wmac {
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status = "okay";
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ralink,mtd-eeprom = <&factory 0>;
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};
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&pci {
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status = "okay";
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};
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&pci1 {
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status = "okay";
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wifi@1,0 {
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compatible = "pci1814,3091";
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reg = <0x10000 0 0 0 0>;
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ralink,5ghz = <0>;
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ralink,mtd-eeprom = <&factory 0x8000>;
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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