mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
From 45a50f21f4e58aba0a9cfe9314c03cef3fad720c Mon Sep 17 00:00:00 2001
|
|
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
Date: Thu, 26 May 2022 18:56:19 +0100
|
|
Subject: [PATCH 1063/1085] drm: vc4: Reset DSI AFE on disable
|
|
|
|
vc4_dsi_bridge_disable wasn't resetting things during shutdown,
|
|
so add that in.
|
|
|
|
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_dsi.c | 20 ++++++++++++++++++++
|
|
1 file changed, 20 insertions(+)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
|
|
@@ -358,6 +358,16 @@
|
|
# define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0)
|
|
# define DSI_PHY_AFEC0_CTATADJ_SHIFT 0
|
|
|
|
+# define DSI0_AFEC0_PD_ALL_LANES (DSI0_PHY_AFEC0_PD | \
|
|
+ DSI0_PHY_AFEC0_PD_BG | \
|
|
+ DSI0_PHY_AFEC0_PD_DLANE1)
|
|
+
|
|
+# define DSI1_AFEC0_PD_ALL_LANES (DSI1_PHY_AFEC0_PD | \
|
|
+ DSI1_PHY_AFEC0_PD_BG | \
|
|
+ DSI1_PHY_AFEC0_PD_DLANE3 | \
|
|
+ DSI1_PHY_AFEC0_PD_DLANE2 | \
|
|
+ DSI1_PHY_AFEC0_PD_DLANE1)
|
|
+
|
|
#define DSI0_PHY_AFEC1 0x68
|
|
# define DSI0_PHY_AFEC1_IDR_DLANE1_MASK VC4_MASK(10, 8)
|
|
# define DSI0_PHY_AFEC1_IDR_DLANE1_SHIFT 8
|
|
@@ -807,6 +817,16 @@ static void vc4_dsi_bridge_disable(struc
|
|
disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
|
|
disp0_ctrl &= ~DSI_DISP0_ENABLE;
|
|
DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
|
|
+
|
|
+ /* Reset the DSI and all its fifos. */
|
|
+ DSI_PORT_WRITE(CTRL, DSI_CTRL_SOFT_RESET_CFG |
|
|
+ DSI_PORT_BIT(CTRL_RESET_FIFOS));
|
|
+
|
|
+ /* Power down the analogue front end. */
|
|
+ DSI_PORT_WRITE(PHY_AFEC0, DSI_PORT_BIT(PHY_AFEC0_RESET) |
|
|
+ DSI_PORT_BIT(PHY_AFEC0_PD) |
|
|
+ DSI_PORT_BIT(AFEC0_PD_ALL_LANES));
|
|
+
|
|
}
|
|
|
|
static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
|