openwrt/target/linux/bcm27xx/patches-6.6/950-1116-mmc-sdhci-extend-maximum-ADMA-transfer-length-to-4Mi.patch
John Audia a09a72d86d kernel: bump 6.6 to 6.6.34
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.34

Removed upstreamed:
	backport-6.6/701-v6.8-net-sfp-bus-fix-SFP-mode-detect-from-bitrate.patch[1]

All other patches automatically rebased.

Build system: x86/64
Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.34&id=9399baa02e4b7f101c39fdbc4d681d54bca4465b

Signed-off-by: John Audia <therealgraysky@proton.me>
2024-06-20 01:55:19 +02:00

48 lines
1.6 KiB
Diff

From 2862884dd5281299433d641c00d419640bb03d7f Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Tue, 4 Jun 2024 13:45:37 +0100
Subject: [PATCH 1116/1135] mmc: sdhci: extend maximum ADMA transfer length to
4MiB
This gains about 8-12% sequential write speed with the fastest SD/eMMC
cards, and Class A1/A2 card sequential performance is only assured with
a 4MiB write length.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/mmc/host/sdhci.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1081,7 +1081,7 @@ static void sdhci_initialize_data(struct
WARN_ON(host->data);
/* Sanity checks */
- BUG_ON(data->blksz * data->blocks > 524288);
+ BUG_ON(data->blksz * data->blocks > host->mmc->max_req_size);
BUG_ON(data->blksz > host->mmc->max_blk_size);
BUG_ON(data->blocks > 65535);
@@ -4724,11 +4724,16 @@ int sdhci_setup_host(struct sdhci_host *
spin_lock_init(&host->lock);
/*
- * Maximum number of sectors in one transfer. Limited by SDMA boundary
- * size (512KiB). Note some tuning modes impose a 4MiB limit, but this
- * is less anyway.
+ * Maximum number of sectors in one transfer.
+ * 4MiB is preferred for multi-descriptor DMA as a) card sequential
+ * write speeds are only guaranteed with a 4MiB write length and
+ * b) most tuning modes require a 4MiB limit.
+ * SDMA has a 512KiB boundary size.
*/
- mmc->max_req_size = 524288;
+ if (host->flags & SDHCI_USE_ADMA)
+ mmc->max_req_size = SZ_4M;
+ else
+ mmc->max_req_size = SZ_512K;
/*
* Maximum number of segments. Depends on if the hardware