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2b88563ee5
* rename the target to realtek * add refactored DSA driver * add latest gpio driver * lots of arch cleanups * new irq driver * additional boards Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: John Crispin <john@phrozen.org>
183 lines
3.2 KiB
Plaintext
183 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#define STRINGIZE(s) #s
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#define LAN_LABEL(p, s) STRINGIZE(p ## s)
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#define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
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#define INTERNAL_PHY(n) \
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phy##n: ethernet-phy@##n { \
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reg = <##n>; \
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compatible = "ethernet-phy-ieee802.3-c22"; \
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phy-is-integrated; \
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};
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#define EXTERNAL_PHY(n) \
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phy##n: ethernet-phy@##n { \
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reg = <##n>; \
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compatible = "ethernet-phy-ieee802.3-c22"; \
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};
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#define EXTERNAL_SFP_PHY(n) \
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phy##n: ethernet-phy@##n { \
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compatible = "ethernet-phy-ieee802.3-c22"; \
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sfp; \
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media = "fibre"; \
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reg = <##n>; \
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};
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#define SWITCH_PORT(n, s, m) \
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port@##n { \
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reg = <##n>; \
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label = SWITCH_PORT_LABEL(s) ; \
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phy-handle = <&phy##n>; \
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phy-mode = #m ; \
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};
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "realtek,rtl838x-soc";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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frequency = <500000000>;
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cpu@0 {
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compatible = "mips,mips4KEc";
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reg = <0>;
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,38400";
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};
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cpuintc: cpuintc {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: rtlintc {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "realtek,rt8380-intc";
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reg = <0xb8003000 0x20>;
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};
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spi0: spi@b8001200 {
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status = "okay";
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compatible = "realtek,rtl838x-nor";
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reg = <0xb8001200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: uart@b8002000 {
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status = "okay";
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compatible = "ns16550a";
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reg = <0xb8002000 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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};
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uart1: uart@b8002100 {
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pinctrl-names = "default";
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pinctrl-0 = <&enable_uart1>;
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status = "okay";
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compatible = "ns16550a";
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reg = <0xb8002100 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&intc>;
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interrupts = <30>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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};
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gpio0: gpio-controller@b8003500 {
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compatible = "realtek,rtl838x-gpio";
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reg = <0xb8003500 0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <23>;
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};
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gpio1: rtl8231-gpio {
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status = "disabled";
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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indirect-access-bus-id = <0>;
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gpio-controller;
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};
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pinmux: pinmux@bb001000 {
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compatible = "pinctrl-single";
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reg = <0xbb001000 0x4>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x1>;
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#pinctrl-cells = <2>;
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enable_uart1: pinmux_enable_uart1 {
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pinctrl-single,bits = <0x0 0x10 0x10>;
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};
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};
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ethernet0: ethernet@bb00a300 {
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status = "okay";
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compatible = "realtek,rtl838x-eth";
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reg = <0xbb00a300 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <24>;
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#interrupt-cells = <1>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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switch0: switch@bb000000 {
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status = "okay";
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interrupt-parent = <&cpuintc>;
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interrupts = <4>;
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compatible = "realtek,rtl83xx-switch";
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};
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};
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