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d3a337a592
* updated SNAND/SNFI driver brings support for MT7981 * add support for MediaTek NAND Memory bad Block Management (NMBM) (not used for any boards atm, but could be useful in future) * wire up NMBM support for MT7622, MT7629, MT7981 and MT7986 * replace some local patches with updated version from SDK * bring some legacy precompiler symbols which haven't been converted into Kconfig symbols in U-Boot 2022.07, remove when bumbping to U-Boot 2022.10: 100-28-include-configs-mt7986-h-from-SDK.patch Source: https://github.com/mtk-openwrt/u-boot Signed-off-by: Daniel Golle <daniel@makrotopia.org>
44 lines
1.2 KiB
Diff
44 lines
1.2 KiB
Diff
From 19f2aa053d5531a9ca0ece04dca172a522d58b90 Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Fri, 29 Jul 2022 11:32:28 +0800
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Subject: [PATCH 32/71] clk: remove log_ret from clk_get_rate
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The return value of clk_get_rate is ulong, an unsigned type. The size of
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ulong depends on the cpu architecture, i.e. 4 bytes on 32-bit CPUs and
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8 bytes on 64-bit CPUs.
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However log_ret only accepts and returns value in int type, a fixed 4-byte
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type. This may truncate the real clock value and cause unexpected error on
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64-bit platforms.
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This patch removes log_ret to solve this issue.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/clk/clk-uclass.c | 7 +------
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1 file changed, 1 insertion(+), 6 deletions(-)
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--- a/drivers/clk/clk-uclass.c
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+++ b/drivers/clk/clk-uclass.c
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@@ -469,7 +469,6 @@ void clk_free(struct clk *clk)
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ulong clk_get_rate(struct clk *clk)
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{
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const struct clk_ops *ops;
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- int ret;
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debug("%s(clk=%p)\n", __func__, clk);
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if (!clk_valid(clk))
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@@ -479,11 +478,7 @@ ulong clk_get_rate(struct clk *clk)
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if (!ops->get_rate)
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return -ENOSYS;
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- ret = ops->get_rate(clk);
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- if (ret)
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- return log_ret(ret);
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-
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- return 0;
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+ return ops->get_rate(clk);
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}
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struct clk *clk_get_parent(struct clk *clk)
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