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6bf179b270
Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi accordingly. The Lantiq IRQ SMP support added upstream required changes to the SoC dtsi as well. Following changes are made to the Lantiq kernel patches: 0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch 0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch applied upstream 0008-MIPS-lantiq-backport-old-timer-code.patch access_ok API update because it lost it's type (which was the first) parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument from access_ok() function") 0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch 0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch revert upstream changes required for upstream xrx200 ethernet and xrx200 (DSA) switch driver but breaking our driver 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch required for our driver but dropped upstream, add former upstream version 0028-NET-lantiq-various-etop-fixes.patch now has to use the phy_set_max_speed API instead of modifying phydev->supported. Also call ltq_dma_enable_irq() in ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS: lantiq: Do not enable IRQs in dma open") Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
107 lines
2.5 KiB
Groff
107 lines
2.5 KiB
Groff
CONFIG_ADM6996_PHY=y
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CONFIG_AR8216_PHY=y
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CONFIG_AT803X_PHY=y
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CONFIG_BLK_MQ_PCI=y
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CONFIG_CPU_MIPSR2_IRQ_EI=y
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CONFIG_CPU_MIPSR2_IRQ_VI=y
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CONFIG_CPU_RMAP=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_ACOMP2=y
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CONFIG_CRYPTO_AEAD=y
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CONFIG_CRYPTO_AEAD2=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_HASH_INFO=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_MANAGER=y
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CONFIG_CRYPTO_MANAGER2=y
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CONFIG_CRYPTO_NULL2=y
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CONFIG_CRYPTO_ZSTD=y
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CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin"
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CONFIG_EXTRA_FIRMWARE_DIR="firmware"
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_HWMON=y
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CONFIG_ICPLUS_PHY=y
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CONFIG_IFX_VPE_EXT=y
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CONFIG_INPUT=y
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CONFIG_INPUT_EVDEV=y
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CONFIG_INPUT_POLLDEV=y
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CONFIG_INTEL_XWAY_PHY=y
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# CONFIG_ISDN is not set
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CONFIG_LANTIQ_XRX200_LEGACY=y
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CONFIG_LEDS_TRIGGER_HEARTBEAT=y
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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CONFIG_MIPS_MT=y
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# CONFIG_MIPS_MT_FPAFF is not set
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CONFIG_MIPS_MT_SMP=y
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CONFIG_MIPS_NR_CPU_NR_MAP=2
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CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
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CONFIG_MIPS_VPE_APSP_API=y
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CONFIG_MIPS_VPE_APSP_API_MT=y
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CONFIG_MIPS_VPE_LOADER=y
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CONFIG_MIPS_VPE_LOADER_MT=y
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CONFIG_MIPS_VPE_LOADER_TOM=y
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CONFIG_MTD_NAND_CORE=y
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CONFIG_MTD_NAND_ECC_SW_HAMMING=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_MTD_NAND_XWAY=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI_BLOCK=y
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# CONFIG_MTD_UBI_FASTMAP is not set
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# CONFIG_MTD_UBI_GLUEBI is not set
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NLS=y
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CONFIG_NR_CPUS=2
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CONFIG_PADATA=y
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CONFIG_PCI=y
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# CONFIG_PCIEAER is not set
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCIE_LANTIQ=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_LANTIQ=y
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CONFIG_PHY_LANTIQ_VRX200_PCIE=y
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CONFIG_POWER_RESET_GPIO=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_POWER_SUPPLY_HWMON=y
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CONFIG_QUEUED_RWLOCKS=y
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CONFIG_QUEUED_SPINLOCKS=y
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CONFIG_RCU_NEED_SEGCBLIST=y
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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CONFIG_RTL8306_PHY=y
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CONFIG_RTL8366S_PHY=y
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CONFIG_RTL8367B_PHY=y
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CONFIG_RTL8367_PHY=y
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CONFIG_SENSORS_LTQ_CPUTEMP=y
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CONFIG_SGL_ALLOC=y
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CONFIG_SMP=y
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CONFIG_SMP_UP=y
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CONFIG_SWCONFIG_LEDS=y
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CONFIG_SYNC_R4K=y
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CONFIG_SYS_SUPPORTS_SCHED_SMT=y
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CONFIG_SYS_SUPPORTS_SMP=y
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CONFIG_TREE_RCU=y
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CONFIG_TREE_SRCU=y
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CONFIG_UBIFS_FS=y
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CONFIG_UBIFS_FS_ADVANCED_COMPR=y
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CONFIG_UBIFS_FS_LZO=y
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CONFIG_UBIFS_FS_ZLIB=y
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CONFIG_UBIFS_FS_ZSTD=y
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CONFIG_USB=y
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CONFIG_USB_COMMON=y
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# CONFIG_USB_EHCI_HCD is not set
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CONFIG_USB_SUPPORT=y
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CONFIG_XPS=y
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CONFIG_XRX200_PHY_FW=y
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CONFIG_XXHASH=y
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CONFIG_ZLIB_DEFLATE=y
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CONFIG_ZLIB_INFLATE=y
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CONFIG_ZSTD_COMPRESS=y
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CONFIG_ZSTD_DECOMPRESS=y
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