mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
c49f135f72
SVN-Revision: 16547
792 lines
24 KiB
Diff
792 lines
24 KiB
Diff
From 778c1668df4a4c634fae8ef99a05120121cce838 Mon Sep 17 00:00:00 2001
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From: Kurt Mahan <kmahan@freescale.com>
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Date: Wed, 18 Jun 2008 15:17:31 -0600
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Subject: [PATCH] Convert CONFIG_M54455 to CONFIG_M5445X for clarity.
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LTIBName: m5445x-rename-config
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Signed-off-by: Kurt Mahan <kmahan@freescale.com>
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---
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arch/m68k/Kconfig | 50 ++++++++++++++++++++++++++++---------
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arch/m68k/Makefile | 2 +-
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arch/m68k/coldfire/Makefile | 2 +-
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arch/m68k/coldfire/config.c | 33 +++++++++++++++----------
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arch/m68k/coldfire/head.S | 23 ++++++++++-------
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arch/m68k/coldfire/ints.c | 6 ++--
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arch/m68k/kernel/dma.c | 4 +-
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arch/m68k/kernel/setup.c | 2 +-
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arch/m68k/mm/kmap.c | 2 +-
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drivers/crypto/Kconfig | 12 ++++----
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drivers/crypto/mcfcau-aes.c | 2 +-
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drivers/crypto/mcfcau-des.c | 2 +-
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drivers/crypto/mcfcau-md5.c | 2 +-
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drivers/crypto/mcfcau-sha1.c | 2 +-
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drivers/crypto/mcfcau.c | 2 +-
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drivers/crypto/mcfcau.h | 2 +-
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drivers/net/Kconfig | 2 +-
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drivers/net/fec.c | 10 ++++----
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drivers/net/fec.h | 2 +-
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drivers/serial/mcfserial.c | 8 +++---
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drivers/spi/coldfire_edma.c | 4 +-
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drivers/spi/spi_coldfire.c | 2 +-
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drivers/spi/ssi_audio.c | 2 +-
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include/asm-m68k/cfcache.h | 2 +-
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include/asm-m68k/coldfire.h | 4 +-
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include/asm-m68k/coldfire_edma.h | 4 +-
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include/asm-m68k/mcfsim.h | 2 +-
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include/asm-m68k/mcfuart.h | 2 +-
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include/asm-m68k/page_offset.h | 2 +-
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include/asm-m68k/setup.h | 2 +-
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30 files changed, 116 insertions(+), 80 deletions(-)
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--- a/arch/m68k/Kconfig
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+++ b/arch/m68k/Kconfig
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@@ -56,7 +56,7 @@ config ARCH_MAY_HAVE_PC_FDC
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default y
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config NO_IOPORT
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- def_bool !(M54455 || M547X_8X)
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+ def_bool !(M5445X || M547X_8X)
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config NO_DMA
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def_bool SUN3
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@@ -143,7 +143,7 @@ config CFV4E
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config MCD_DMA
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bool "ColdFire MCD DMA support"
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- depends on CFV4E
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+ depends on M547X_8X
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default y
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help
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This enables support for the ColdFire 547x/548x family
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@@ -177,7 +177,7 @@ config HADES
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config PCI
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bool
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depends on HADES || M54455
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- default y
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+ default n
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help
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Find out whether you have a PCI motherboard. PCI is the name of a
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bus system, i.e. the way the CPU talks to the other stuff inside
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@@ -325,11 +325,34 @@ config M68060
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If you anticipate running this kernel on a computer with a MC68060
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processor, say Y. Otherwise, say N.
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-config M54455
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- bool "MCF54455 support"
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+config M5445X
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+ bool "MCF5445x support"
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depends on COLDFIRE
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help
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- This option will add support for the MCF54455 processor with mmu.
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+ This option will add support for the MCF5445 processor with mmu.
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+
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+config M54451
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+ bool
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+ depends on M5445X
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+ default n
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+
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+config M54455
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+ bool
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+ depends on M5445X
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+ default n
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+
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+choice
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+ prompt "Model"
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+ depends on M5445X
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+ default M54451EVB
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+ config M54451EVB
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+ bool "M54451EVB"
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+ select M54451
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+ config M54455EVB
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+ bool "M54455EVB"
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+ select M54455
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+endchoice
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+
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config M547X_8X
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bool "MCF547x/MCF548x support"
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@@ -393,7 +416,8 @@ endchoice
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config MCFCLK
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int
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- default 266666666 if M54455
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+ default 266666666 if M54455EVB
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+ default 240000000 if M54451EVB
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default 266000000 if M547X
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default 200000000 if M548X
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help
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@@ -401,7 +425,7 @@ config MCFCLK
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config MCF_USER_HALT
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bool "Coldfire User Halt Enable"
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- depends on M54455 || M547X_8X
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+ depends on M5445X || M547X_8X
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default n
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help
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Enables the HALT instruction in User Mode.
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@@ -420,19 +444,21 @@ config MMU_CFV4E
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config SDRAM_BASE
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hex
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depends on COLDFIRE
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- default 0x40000000 if M54455
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+ default 0x40000000 if M5445X
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default 0x00000000 if M547X_8X
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config SDRAM_SIZE
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hex
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depends on COLDFIRE
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- default 0x0FFFFFFF if M54455
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+ default 0x08000000 if M54451EVB
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+ default 0x10000000 if M54455EVB
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default 0x04000000 if M547X_8X
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config NOR_FLASH_BASE
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hex "NOR Flash Base Address"
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- depends on M54455
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- default 0x00000000
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+ depends on COLDFIRE
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+ default 0x00000000 if M54451EVB
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+ default 0x00000000 if M54455EVB
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config M68KFPU_EMU
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bool "Math emulation support (EXPERIMENTAL)"
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--- a/arch/m68k/Makefile
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+++ b/arch/m68k/Makefile
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@@ -59,7 +59,7 @@ endif
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endif
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endif
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-ifdef CONFIG_M54455
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+ifdef CONFIG_M5445X
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KBUILD_CFLAGS += -march=isac -mcpu=54455 -msoft-float -g
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KBUILD_AFLAGS += -march=isac -mcpu=54455 -msoft-float
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endif
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--- a/arch/m68k/coldfire/Makefile
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+++ b/arch/m68k/coldfire/Makefile
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@@ -9,7 +9,7 @@ ifneq ($(strip $(CONFIG_USB) $(CONFIG_US
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endif
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obj-$(CONFIG_PCI) += pci.o mcf5445x-pci.o iomap.o
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-obj-$(CONFIG_M54455) += mcf5445x-devices.o
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+obj-$(CONFIG_M5445X) += mcf5445x-devices.o
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obj-$(CONFIG_M547X_8X) += m547x_8x-devices.o
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obj-$(CONFIG_M547X_8X) += mcf548x-devices.o
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obj-$(CONFIG_MCD_DMA) += m547x_8x-dma.o
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--- a/arch/m68k/coldfire/config.c
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+++ b/arch/m68k/coldfire/config.c
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@@ -35,14 +35,14 @@
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#include <asm/mcfsim.h>
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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#define UBOOT_EXTRA_CLOCKS
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#elif defined(CONFIG_M547X_8X)
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#define UBOOT_PCI
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#endif
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#include <asm/bootinfo.h>
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-#ifdef CONFIG_M54455
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+#ifdef CONFIG_M5445X
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#include <asm/mcf5445x_intc.h>
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#include <asm/mcf5445x_sdramc.h>
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#include <asm/mcf5445x_fbcs.h>
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@@ -132,8 +132,9 @@ int __init uboot_commandline(char *boota
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/*
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* This routine does things not done in the bootloader.
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*/
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-#if defined(CONFIG_M54455)
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-#define DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
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+#if defined(CONFIG_M5445X)
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+#define FOO_DEFAULT_COMMAND_LINE "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
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+#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/redstripe/rootfs/ ip=172.27.155.51:172.27.155.1"
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#elif defined(CONFIG_M547X_8X)
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#define DEFAULT_COMMAND_LINE "debug root=/dev/nfs rw nfsroot=172.27.155.1:/tftpboot/rigo/rootfs/ ip=172.27.155.85:172.27.155.1"
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#endif
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@@ -143,14 +144,14 @@ asmlinkage void __init cf_early_init(voi
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extern char _end;
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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SET_VBR((void *)MCF_RAMBAR1);
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#elif defined(CONFIG_M547X_8X)
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SET_VBR((void *)MCF_RAMBAR0);
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#endif
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/* Mask all interrupts */
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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MCF_INTC0_IMRL = 0xFFFFFFFF;
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MCF_INTC0_IMRH = 0xFFFFFFFF;
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MCF_INTC1_IMRL = 0xFFFFFFFF;
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@@ -160,7 +161,7 @@ asmlinkage void __init cf_early_init(voi
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MCF_IMRH = 0xFFFFFFFF;
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#endif
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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#if defined(CONFIG_NOR_FLASH_BASE)
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MCF_FBCS_CSAR(1) = CONFIG_NOR_FLASH_BASE;
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#else
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@@ -171,9 +172,9 @@ asmlinkage void __init cf_early_init(voi
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/* Init optional SDRAM chip select */
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MCF_SDRAMC_SDCS(1) = (256*1024*1024) | 0x1B;
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#endif
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-#endif /* CONFIG_M54455 */
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+#endif /* CONFIG_M5445X */
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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/* Setup SDRAM crossbar(XBS) priorities */
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MCF_XBS_PRS2 = (MCF_XBS_PRS_M0(MCF_XBS_PRI_2) |
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MCF_XBS_PRS_M1(MCF_XBS_PRI_3) |
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@@ -193,6 +194,7 @@ asmlinkage void __init cf_early_init(voi
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m68k_memory[m68k_num_memory].addr = CONFIG_SDRAM_BASE;
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m68k_memory[m68k_num_memory++].size = CONFIG_SDRAM_SIZE;
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+#if 0
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if (!uboot_commandline(m68k_command_line)) {
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#if defined(CONFIG_BOOTPARAM)
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strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE-1);
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@@ -200,6 +202,10 @@ asmlinkage void __init cf_early_init(voi
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strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
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#endif
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}
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+#endif
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+/* JKM -- temporary! */
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+strcpy(m68k_command_line, DEFAULT_COMMAND_LINE);
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+/* JKM -- temporary! */
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#if defined(CONFIG_BLK_DEV_INITRD)
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/* add initrd image */
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@@ -223,9 +229,10 @@ asmlinkage void __init cf_early_init(voi
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/* Turn on caches via CACR, enable EUSP */
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cacr_set(CACHE_INITIAL_MODE);
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+
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}
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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void settimericr(unsigned int timer, unsigned int level)
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{
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volatile unsigned char *icrp;
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@@ -256,7 +263,7 @@ void __init coldfire_trap_init(void)
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int i = 0;
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e_vector *vectors;
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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vectors = (e_vector *)MCF_RAMBAR1;
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#elif defined(CONFIG_M547X_8X)
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vectors = (e_vector *)MCF_RAMBAR0;
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@@ -281,7 +288,7 @@ void __init coldfire_trap_init(void)
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vectors[32] = system_call;
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}
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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void coldfire_tick(void)
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{
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@@ -369,7 +376,7 @@ unsigned long coldfire_gettimeoffset(voi
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void coldfire_reboot(void)
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{
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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/* disable interrupts and do a software reset */
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asm("movew #0x2700, %%sr\n\t"
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"moveb #0x80, %%d0\n\t"
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--- a/arch/m68k/coldfire/head.S
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+++ b/arch/m68k/coldfire/head.S
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@@ -63,8 +63,8 @@
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* None currently (mapped via TLBs)
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*/
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-#if CONFIG_SDRAM_BASE != PAGE_BASE
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-#if defined(CONFIG_M54455)
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+#if CONFIG_SDRAM_BASE != PAGE_OFFSET
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+#if defined(CONFIG_M5445X)
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#if 0
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#define ACR0_DEFAULT #0xA00FA048 /* ACR0 default value */
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#endif
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@@ -85,7 +85,11 @@
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#endif
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#else
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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+#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
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+#define ACR1_DEFAULT #0x400FA008 /* ACR1 default value */
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+#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
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+#define ACR3_DEFAULT #0x400FA008 /* ACR3 default value */
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#elif defined(CONFIG_M547X_8X)
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#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
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#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
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@@ -280,7 +284,7 @@ ENTRY(__start)
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subl %a0,%a0
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movel %a0,%usp
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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movel #(MCF_RAMBAR1 + 0x221), %d0
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movec %d0, %rambar1
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#elif defined(CONFIG_M547X_8X)
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@@ -331,12 +335,11 @@ _loop_bss:
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cmpl %a0,%a1
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bne _loop_bss
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#endif
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-
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/* If you change the memory size to another value make a matching
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change in paging_init(cf-mmu.c) to zones_size[]. */
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#if CONFIG_SDRAM_BASE != PAGE_OFFSET
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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/* Map 256MB as code */
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mmu_map (PAGE_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), \
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MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_IC, MMUDR_SP, \
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@@ -502,7 +505,7 @@ _loop_bss:
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* enabled and we are executing in high memory.
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*/
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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/* Map first 16 MB as code */
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mmu_map (PHYS_OFFSET+0*0x1000000), (PHYS_OFFSET+0*0x1000000), \
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MMUOR_ITLB, 0, MMUTR_SG, MMUDR_SZ16M, MMUDR_INC, MMUDR_SP, 0, \
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@@ -562,7 +565,7 @@ ENTRY(__running_high)
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/* Unmap unity mappings */
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#if CONFIG_SDRAM_BASE != PAGE_OFFSET
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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mmu_unmap (PHYS_OFFSET+0*0x1000000), MMUOR_ITLB, %d0
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mmu_unmap (PHYS_OFFSET+0*0x1000000), 0, %d0
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#elif defined(CONFIG_M547X_8X)
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@@ -599,9 +602,9 @@ func_start set_context,%d0,(1*4)
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movec %d0,%asid
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func_return set_context
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-#ifdef CONFIG_M54455
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+#ifdef CONFIG_M5445X
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/*
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- * set_fpga(addr,val) on the M54455EVB
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+ * set_fpga(addr,val) on the M5445X
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*
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* Map in 0x00000000 -> 0x0fffffff and then do the write.
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*/
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--- a/arch/m68k/coldfire/ints.c
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+++ b/arch/m68k/coldfire/ints.c
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@@ -47,7 +47,7 @@ static int irq_depth[SYS_IRQS];
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/*
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* IRQ Controller
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*/
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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void m5445x_irq_enable(unsigned int irq);
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void m5445x_irq_disable(unsigned int irq);
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static struct irq_controller m5445x_irq_controller = {
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@@ -87,7 +87,7 @@ void __init init_IRQ(void)
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{
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int i;
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-#if defined(CONFIG_M54455)
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+#if defined(CONFIG_M5445X)
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for (i = 0; i < SYS_IRQS; i++)
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irq_controller[i] = &m5445x_irq_controller;
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#elif defined(CONFIG_M547X_8X)
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@@ -337,7 +337,7 @@ asmlinkage void handle_badint(struct pt_
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}
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EXPORT_SYMBOL(handle_badint);
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-#ifdef CONFIG_M54455
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+#ifdef CONFIG_M5445X
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/*
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* M5445X Implementation
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*/
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--- a/arch/m68k/kernel/dma.c
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+++ b/arch/m68k/kernel/dma.c
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@@ -17,7 +17,7 @@
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t flag)
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{
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-#ifndef CONFIG_M54455
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+#ifndef CONFIG_M5445X
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struct page *page, **map;
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pgprot_t pgprot;
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void *addr;
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@@ -75,7 +75,7 @@ void dma_free_coherent(struct device *de
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void *addr, dma_addr_t handle)
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{
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pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
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-#ifndef CONFIG_M54455
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+#ifndef CONFIG_M5445X
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vfree(addr);
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#else
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kfree(addr);
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--- a/arch/m68k/kernel/setup.c
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+++ b/arch/m68k/kernel/setup.c
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@@ -519,7 +519,7 @@ int get_hardware_list(char *buffer)
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void check_bugs(void)
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{
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-#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M54455)
|
|
+#if !defined(CONFIG_M68KFPU_EMU) && !defined(CONFIG_M5445X)
|
|
if (m68k_fputype == 0) {
|
|
printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
|
|
"WHICH IS REQUIRED BY LINUX/M68K ***\n");
|
|
--- a/arch/m68k/mm/kmap.c
|
|
+++ b/arch/m68k/mm/kmap.c
|
|
@@ -133,7 +133,7 @@ void __iomem *__ioremap(unsigned long ph
|
|
}
|
|
#endif
|
|
|
|
-#ifdef CONFIG_M54455
|
|
+#ifdef CONFIG_M5445X
|
|
if (physaddr >= 0xf0000000) {
|
|
/*
|
|
* On the M5445x processors an ACR is setup to map
|
|
--- a/drivers/crypto/Kconfig
|
|
+++ b/drivers/crypto/Kconfig
|
|
@@ -62,15 +62,15 @@ config CRYPTO_DEV_GEODE
|
|
|
|
config CRYPTO_DEV_MCFCAU
|
|
bool "Support for Freescale Coldfire Cryptographic Acceleration Unit (CAU)"
|
|
- depends on M54455
|
|
+ depends on M5445X
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
The cryptographic acceleration unit (CAU) is a ColdFire coprocessor
|
|
implementing a set of specialized operations in hardware. For example, you can
|
|
- find it on MCF54455.
|
|
+ find it on MCF5445X.
|
|
|
|
config CRYPTO_DEV_MCFCAU_DES
|
|
- tristate "DES and Triple DES cipher algorithms (MCF54455)"
|
|
+ tristate "DES and Triple DES cipher algorithms (MCF5445X)"
|
|
depends on CRYPTO_DEV_MCFCAU
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLKCIPHER
|
|
@@ -84,7 +84,7 @@ config CRYPTO_DEV_MCFCAU_DES
|
|
will be called mcfcau-des.
|
|
|
|
config CRYPTO_DEV_MCFCAU_AES
|
|
- tristate "AES cipher algorithm (MCF54455)"
|
|
+ tristate "AES cipher algorithm (MCF5445X)"
|
|
depends on CRYPTO_DEV_MCFCAU
|
|
select CRYPTO_ALGAPI
|
|
select CRYPTO_BLKCIPHER
|
|
@@ -98,7 +98,7 @@ config CRYPTO_DEV_MCFCAU_AES
|
|
will be called mcfcau-aes.
|
|
|
|
config CRYPTO_DEV_MCFCAU_MD5
|
|
- tristate "MD5 digest algorithm (MCF54455)"
|
|
+ tristate "MD5 digest algorithm (MCF5445X)"
|
|
depends on CRYPTO_DEV_MCFCAU
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
@@ -111,7 +111,7 @@ config CRYPTO_DEV_MCFCAU_MD5
|
|
will be called mcfcau-md5.
|
|
|
|
config CRYPTO_DEV_MCFCAU_SHA1
|
|
- tristate "SHA1 digest algorithm (MCF54455)"
|
|
+ tristate "SHA1 digest algorithm (MCF5445X)"
|
|
depends on CRYPTO_DEV_MCFCAU
|
|
select CRYPTO_ALGAPI
|
|
help
|
|
--- a/drivers/crypto/mcfcau-aes.c
|
|
+++ b/drivers/crypto/mcfcau-aes.c
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/crypto/mcfcau-des.c
|
|
+++ b/drivers/crypto/mcfcau-des.c
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/crypto/mcfcau-md5.c
|
|
+++ b/drivers/crypto/mcfcau-md5.c
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/crypto/mcfcau-sha1.c
|
|
+++ b/drivers/crypto/mcfcau-sha1.c
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/crypto/mcfcau.c
|
|
+++ b/drivers/crypto/mcfcau.c
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/crypto/mcfcau.h
|
|
+++ b/drivers/crypto/mcfcau.h
|
|
@@ -5,7 +5,7 @@
|
|
* Author: Andrey Butok
|
|
* Copyright Freescale Semiconductor Inc. 2007
|
|
*
|
|
- * NOTE: You can find the ColdFire CAU module on MCF54455 and MCF52235.
|
|
+ * NOTE: You can find the ColdFire CAU module on MCF5445X and MCF52235.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
--- a/drivers/net/Kconfig
|
|
+++ b/drivers/net/Kconfig
|
|
@@ -1975,7 +1975,7 @@ config 68360_ENET
|
|
|
|
config FEC
|
|
bool "FEC ethernet controller (of ColdFire CPUs)"
|
|
- depends on M523x || M527x || M5272 || M528x || M520x || M54455
|
|
+ depends on M523x || M527x || M5272 || M528x || M520x || M5445X
|
|
help
|
|
Say Y here if you want to use the built-in 10/100 Fast ethernet
|
|
controller on some Motorola ColdFire processors.
|
|
--- a/drivers/net/fec.c
|
|
+++ b/drivers/net/fec.c
|
|
@@ -52,7 +52,7 @@
|
|
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
|
|
defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
|
|
defined(CONFIG_M520x) || defined(CONFIG_M532x) || \
|
|
- defined(CONFIG_M54455)
|
|
+ defined(CONFIG_M5445X)
|
|
|
|
#include <asm/coldfire.h>
|
|
#include <asm/mcfsim.h>
|
|
@@ -84,7 +84,7 @@ static unsigned int fec_hw[] = {
|
|
(MCF_MBAR+0x30000),
|
|
#elif defined(CONFIG_M532x)
|
|
(MCF_MBAR+0xfc030000),
|
|
-#elif defined(CONFIG_M54455)
|
|
+#elif defined(CONFIG_M5445X)
|
|
(MCF_MBAR+0xfc030000),
|
|
#if defined(CONFIG_FEC2)
|
|
(MCF_MBAR+0xfc034000),
|
|
@@ -179,7 +179,7 @@ typedef struct {
|
|
* account when setting it.
|
|
*/
|
|
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
|
|
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
|
|
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X)
|
|
#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
|
|
#else
|
|
#define OPT_FRAME_SIZE 0
|
|
@@ -1831,9 +1831,9 @@ static void __inline__ fec_uncache(unsig
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
|
|
-#elif defined(CONFIG_M54455)
|
|
+#elif defined(CONFIG_M5445X)
|
|
/*
|
|
- * Code specific for M54455
|
|
+ * Code specific for M5445X
|
|
*/
|
|
|
|
static void __inline__ fec_request_intrs(struct net_device *dev)
|
|
--- a/drivers/net/fec.h
|
|
+++ b/drivers/net/fec.h
|
|
@@ -14,7 +14,7 @@
|
|
/****************************************************************************/
|
|
|
|
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
|
|
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455)
|
|
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X)
|
|
/*
|
|
* Just figures, Motorola would have to change the offsets for
|
|
* registers in the same peripheral device on different models
|
|
--- a/drivers/serial/mcfserial.c
|
|
+++ b/drivers/serial/mcfserial.c
|
|
@@ -69,7 +69,7 @@ struct timer_list mcfrs_timer_struct;
|
|
#define DEFAULT_CBAUD B38400
|
|
#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || \
|
|
defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO) || \
|
|
- defined(CONFIG_M54455) || defined(CONFIG_M547X_8X)
|
|
+ defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
|
|
#define CONSOLE_BAUD_RATE 115200
|
|
#define DEFAULT_CBAUD B115200
|
|
#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
|
|
@@ -102,7 +102,7 @@ static struct tty_driver *mcfrs_serial_d
|
|
#undef SERIAL_DEBUG_FLOW
|
|
|
|
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
|
|
- defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M54455) || \
|
|
+ defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445X) || \
|
|
defined(CONFIG_M547X_8X)
|
|
#define IRQBASE (MCFINT_VECBASE+MCFINT_UART0)
|
|
#else
|
|
@@ -1630,7 +1630,7 @@ static void mcfrs_irqinit(struct mcf_ser
|
|
/* GPIOs also must be initalized, depends on board */
|
|
break;
|
|
}
|
|
-#elif defined(CONFIG_M54455)
|
|
+#elif defined(CONFIG_M5445X)
|
|
volatile unsigned char *uartp;
|
|
uartp = info->addr;
|
|
switch (info->line) {
|
|
@@ -2022,7 +2022,7 @@ struct console mcfrs_console = {
|
|
|
|
static int __init mcfrs_console_init(void)
|
|
{
|
|
-#if !(defined(CONFIG_M54455) || defined(CONFIG_M547X_8X))
|
|
+#if !(defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X))
|
|
register_console(&mcfrs_console);
|
|
#endif
|
|
return 0;
|
|
--- a/drivers/spi/coldfire_edma.c
|
|
+++ b/drivers/spi/coldfire_edma.c
|
|
@@ -20,10 +20,10 @@
|
|
#include <linux/cdev.h>
|
|
#include <linux/seq_file.h>
|
|
#include <linux/proc_fs.h>
|
|
-#ifdef CONFIG_M54455
|
|
+#ifdef CONFIG_M5445X
|
|
#include <asm/mcf5445x_edma.h>
|
|
#include <asm/mcf5445x_intc.h>
|
|
-#endif /* CONFIG_M54455 */
|
|
+#endif /* CONFIG_M5445X */
|
|
#include <asm/coldfire_edma.h>
|
|
|
|
/*
|
|
--- a/drivers/spi/spi_coldfire.c
|
|
+++ b/drivers/spi/spi_coldfire.c
|
|
@@ -57,7 +57,7 @@
|
|
#include <asm/mcfqspi.h>
|
|
#include <asm/coldfire.h>
|
|
|
|
-#if defined(CONFIG_M54455)
|
|
+#if defined(CONFIG_M5445X)
|
|
#include <asm/virtconvert.h>
|
|
|
|
#define SPI_DSPI
|
|
--- a/drivers/spi/ssi_audio.c
|
|
+++ b/drivers/spi/ssi_audio.c
|
|
@@ -25,7 +25,7 @@
|
|
|
|
#include <asm/coldfire.h>
|
|
#include <asm/coldfire_edma.h>
|
|
-#ifdef CONFIG_M54455
|
|
+#ifdef CONFIG_M5445X
|
|
#include <asm/mcf5445x_ssi.h>
|
|
#include <asm/mcf5445x_ccm.h>
|
|
#include <asm/mcf5445x_gpio.h>
|
|
--- a/include/asm-m68k/cfcache.h
|
|
+++ b/include/asm-m68k/cfcache.h
|
|
@@ -40,7 +40,7 @@
|
|
#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */
|
|
#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */
|
|
|
|
-#ifdef CONFIG_M54455
|
|
+#ifdef CONFIG_M5445X
|
|
/*
|
|
* M5445x Cache Configuration
|
|
* - cache line size is 16 bytes
|
|
--- a/include/asm-m68k/coldfire.h
|
|
+++ b/include/asm-m68k/coldfire.h
|
|
@@ -1,9 +1,9 @@
|
|
#ifndef _COLDFIRE_H_
|
|
#define _COLDFIRE_H_
|
|
|
|
-#if defined(CONFIG_M54455)
|
|
+#if defined(CONFIG_M5445X)
|
|
#define MCF_MBAR 0x0
|
|
-#define MCF_RAMBAR1 0x40000000
|
|
+#define MCF_RAMBAR1 0x80000000
|
|
#define MCF_SRAM 0x80000000
|
|
#elif defined(CONFIG_M547X_8X)
|
|
#define MCF_MBAR 0xF0000000
|
|
--- a/include/asm-m68k/coldfire_edma.h
|
|
+++ b/include/asm-m68k/coldfire_edma.h
|
|
@@ -20,14 +20,14 @@
|
|
#define EDMA_DRIVER_NAME "ColdFire-eDMA"
|
|
#define DMA_DEV_MINOR 1
|
|
|
|
-#ifdef CONFIG_M54455
|
|
+#ifdef CONFIG_M5445X
|
|
#define EDMA_INT_CHANNEL_BASE 8
|
|
#define EDMA_INT_CONTROLLER_BASE 64
|
|
#define EDMA_INT_BASE (EDMA_INT_CHANNEL_BASE + \
|
|
EDMA_INT_CONTROLLER_BASE)
|
|
#define EDMA_CHANNELS 16
|
|
#define EDMA_INT_ERR 16 /* edma error interrupt */
|
|
-#endif /* CONFIG_M54455 */
|
|
+#endif /* CONFIG_M5445X */
|
|
|
|
typedef irqreturn_t (*edma_irq_handler)(int, void *);
|
|
typedef void (*edma_error_handler)(int, void *);
|
|
--- a/include/asm-m68k/mcfsim.h
|
|
+++ b/include/asm-m68k/mcfsim.h
|
|
@@ -12,7 +12,7 @@
|
|
#include <asm/coldfire.h>
|
|
#endif
|
|
|
|
-#if defined(CONFIG_M54455)
|
|
+#if defined(CONFIG_M5445X)
|
|
#include <asm/mcf5445x_intc.h>
|
|
#include <asm/mcf5445x_gpio.h>
|
|
#include <asm/mcf5445x_i2c.h>
|
|
--- a/include/asm-m68k/mcfuart.h
|
|
+++ b/include/asm-m68k/mcfuart.h
|
|
@@ -15,7 +15,7 @@
|
|
* Define the base address of the UARTS within the MBAR address
|
|
* space.
|
|
*/
|
|
-#if defined(CONFIG_M54455)
|
|
+#if defined(CONFIG_M5445X)
|
|
#include <asm/mcf5445x_intc.h>
|
|
#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */
|
|
#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */
|
|
--- a/include/asm-m68k/page_offset.h
|
|
+++ b/include/asm-m68k/page_offset.h
|
|
@@ -4,7 +4,7 @@
|
|
#if defined(CONFIG_SUN3)
|
|
#define PAGE_OFFSET_RAW 0x0E000000
|
|
|
|
-#elif defined(CONFIG_M54455) || defined(CONFIG_M547X_8X)
|
|
+#elif defined(CONFIG_M5445X) || defined(CONFIG_M547X_8X)
|
|
#define PHYS_OFFSET CONFIG_SDRAM_BASE
|
|
#define PAGE_OFFSET_RAW (PHYS_OFFSET)
|
|
/* #define PAGE_OFFSET_RAW 0xC0000000 */
|
|
--- a/include/asm-m68k/setup.h
|
|
+++ b/include/asm-m68k/setup.h
|
|
@@ -240,7 +240,7 @@ extern unsigned long m68k_machtype;
|
|
#define FPU_68040 (1<<FPUB_68040)
|
|
#define FPU_68060 (1<<FPUB_68060)
|
|
#define FPU_SUNFPA (1<<FPUB_SUNFPA)
|
|
-#ifndef CONFIG_M54455
|
|
+#ifndef CONFIG_M5445X
|
|
#define FPU_CFV4E (1<<FPUB_CFV4E)
|
|
#else
|
|
#define FPU_CFV4E 0
|