openwrt/target/linux/ath79/dts/ar9344_atheros_db120.dts
Zoltan HERPAI 98eb95dd00 ath79: add support for Atheros DB120 reference board
Atheros DB120 reference board.

Specifications:

SoC:    QCA9344
DRAM:   128Mb DDR2
Flash:  8Mb SPI-NOR, 128Mb NAND flash
Switch: 5x 10/100Mbps via AR8229 switch (integrated into SoC),
        5x 10/100/1000Mbps via QCA8237 via RGMII
WLAN:   AR9300 (SoC, 2.4G+5G) + AR9340 (PCIe, 5G-only)
USB:    1x 2.0
UART:   standard QCA UART header
JTAG:   yes
Button: 1x reset
LEDs:   a lot
Slots:  2x mPCIe + 1x mini-PCI, but using them requires
        additional undocumented changes.
Misc:   The board allows to boot off NAND, and there is
        I2S audio support as well - also requiring
        additional undocumented changes.

Installation:

1. Original bootloader

   Connect the board to ethernet
   Set up a server with an IP address of 192.168.1.10
   Make the openwrt-ath79-generic-atheros_db120-squashfs-factory.bin
   available via TFTP

   tftpboot 0x80060000 openwrt-ath79-generic-atheros_db120-squashfs-factory.bin
   erase 0x9f050000 +$filesize
   cp.b $fileaddr 0x9f050000 $filesize

2. pepe2k's u-boot_mod

   Connect the board to ethernet
   Set up a server with an IP address of 192.168.1.10
   Make the openwrt-ath79-generic-atheros_db120-squashfs-factory.bin
   available via TFTP, as "firmware.bin"

   run fw_upg

   Reboot the board.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
[explicit factory recipe in generic.mk, sorting in 10-ath9k-eeprom,
 convert to nvmem, use fwconcat* names in DTS, remove unneeded DT
 labels, remove redundant uart node]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-08-22 23:02:08 +02:00

251 lines
4.1 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
model = "Atheros DB120 reference board";
compatible = "atheros,db120", "qca,ar9344";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
leds {
compatible = "gpio-leds";
wlan2g {
label = "green:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_system: system {
label = "green:system";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
usb {
label = "green:usb";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
};
leds-ath9k {
compatible = "gpio-leds";
wlan5g-ath {
label = "green:wlan5g-ath";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
wps {
linux,code = <KEY_WPS_BUTTON>;
label = "WPS button";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
virtual_flash {
compatible = "mtd-concat";
devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x0>;
label = "firmware";
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <IH_MAGIC_OKLI>;
};
};
};
};
&ref {
clock-frequency = <40000000>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
fwconcat0: partition@50000 {
label = "fwconcat0";
reg = <0x050000 0x630000>;
};
partition@680000 {
label = "loader";
reg = <0x680000 0x010000>;
};
fwconcat1: partition@690000 {
label = "fwconcat1";
reg = <0x690000 0x150000>;
};
partition@7e0000 {
label = "nvram";
reg = <0x7e0000 0x010000>;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
pll-data = <0x06000000 0x00000101 0x00001616>;
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
phy-mode = "rgmii";
phy-handle = <&phy0>;
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0xc1000000 /* POWER_ON_STRAP */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6_STATUS */
>;
};
};
&pinmux {
pmx_led_wan_lan: pinmux_led_wan_lan {
pinctrl-single,bits = <0x10 0x2c2d0000 0xffff0000>,
<0x14 0x292a2b 0xffffff>;
};
};
&builtin_switch {
pinctrl-names = "default";
pinctrl-0 = <&pmx_led_wan_lan>;
/delete-property/qca,phy4-mii-enable;
};
&eth1 {
status = "okay";
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
gmac-config {
device = <&gmac>;
switch-phy-swap = <0>;
switch-only-mode = <1>;
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
qca,disable-2ghz;
#gpio-cells = <2>;
gpio-controller;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};
&usb {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};