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https://github.com/openwrt/openwrt.git
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130 lines
3.7 KiB
Diff
130 lines
3.7 KiB
Diff
From b95144c1b702f98c7902c75beb83f323701eb7c5 Mon Sep 17 00:00:00 2001
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From: Maarten ter Huurne <maarten@treewalker.org>
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Date: Sun, 19 Jun 2011 10:57:18 +0200
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Subject: [PATCH 13/21] MMC: JZ4740: Added support for CPU frequency changing.
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The MSC device clock is stopped before the frequency change.
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After the change a new divider is computed and the clock is restarted.
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Also the frequency change is postponed if an I/O operation is in progress.
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---
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drivers/mmc/host/jz4740_mmc.c | 69 +++++++++++++++++++++++++++++++++++++++-
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1 files changed, 67 insertions(+), 2 deletions(-)
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--- a/drivers/mmc/host/jz4740_mmc.c
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+++ b/drivers/mmc/host/jz4740_mmc.c
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@@ -23,6 +23,7 @@
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#include <linux/delay.h>
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#include <linux/scatterlist.h>
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#include <linux/clk.h>
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+#include <linux/cpufreq.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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@@ -685,6 +686,60 @@ static void jz4740_mmc_enable_sdio_irq(s
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jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_SDIO, enable);
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}
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+#ifdef CONFIG_CPU_FREQ
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+
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+static struct jz4740_mmc_host *cpufreq_host;
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+
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+static int jz4740_mmc_cpufreq_transition(struct notifier_block *nb,
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+ unsigned long val, void *data)
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+{
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+ /* TODO: We only have to take action when the PLL freq changes:
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+ the main dividers have no influence on the MSC device clock. */
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+
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+ if (val == CPUFREQ_PRECHANGE) {
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+ mmc_claim_host(cpufreq_host->mmc);
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+ clk_disable(cpufreq_host->clk);
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+ } else if (val == CPUFREQ_POSTCHANGE) {
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+ struct mmc_ios *ios = &cpufreq_host->mmc->ios;
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+ if (ios->clock)
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+ jz4740_mmc_set_clock_rate(cpufreq_host, ios->clock);
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+ if (ios->power_mode != MMC_POWER_OFF)
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+ clk_enable(cpufreq_host->clk);
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+ mmc_release_host(cpufreq_host->mmc);
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+ }
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+ return 0;
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+}
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+
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+static struct notifier_block jz4740_mmc_cpufreq_nb = {
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+ .notifier_call = jz4740_mmc_cpufreq_transition,
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+};
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+
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+static inline int jz4740_mmc_cpufreq_register(struct jz4740_mmc_host *host)
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+{
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+ cpufreq_host = host;
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+ return cpufreq_register_notifier(&jz4740_mmc_cpufreq_nb,
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+ CPUFREQ_TRANSITION_NOTIFIER);
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+}
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+
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+static inline void jz4740_mmc_cpufreq_unregister(void)
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+{
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+ cpufreq_unregister_notifier(&jz4740_mmc_cpufreq_nb,
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+ CPUFREQ_TRANSITION_NOTIFIER);
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+}
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+
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+#else
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+
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+static inline int jz4740_mmc_cpufreq_register(struct jz4740_mmc_host *host)
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+{
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+ return 0;
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+}
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+
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+static inline void jz4740_mmc_cpufreq_unregister(void)
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+{
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+}
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+
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+#endif
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+
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static const struct mmc_host_ops jz4740_mmc_ops = {
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.request = jz4740_mmc_request,
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.set_ios = jz4740_mmc_set_ios,
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@@ -834,11 +889,18 @@ static int jz4740_mmc_probe(struct platf
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goto err_free_host;
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}
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+ ret = jz4740_mmc_cpufreq_register(host);
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+ if (ret) {
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+ dev_err(&pdev->dev,
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+ "Failed to register cpufreq transition notifier\n");
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+ goto err_clk_put;
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+ }
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+
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host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!host->mem) {
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ret = -ENOENT;
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dev_err(&pdev->dev, "Failed to get base platform memory\n");
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- goto err_clk_put;
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+ goto err_cpufreq_unreg;
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}
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host->mem = request_mem_region(host->mem->start,
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@@ -846,7 +908,7 @@ static int jz4740_mmc_probe(struct platf
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if (!host->mem) {
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ret = -EBUSY;
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dev_err(&pdev->dev, "Failed to request base memory region\n");
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- goto err_clk_put;
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+ goto err_cpufreq_unreg;
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}
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host->base = ioremap_nocache(host->mem->start, resource_size(host->mem));
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@@ -929,6 +991,8 @@ err_iounmap:
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iounmap(host->base);
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err_release_mem_region:
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release_mem_region(host->mem->start, resource_size(host->mem));
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+err_cpufreq_unreg:
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+ jz4740_mmc_cpufreq_unregister();
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err_clk_put:
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clk_put(host->clk);
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err_free_host:
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@@ -958,6 +1022,7 @@ static int jz4740_mmc_remove(struct plat
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iounmap(host->base);
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release_mem_region(host->mem->start, resource_size(host->mem));
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+ jz4740_mmc_cpufreq_unregister();
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clk_put(host->clk);
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platform_set_drvdata(pdev, NULL);
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