mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From effa2ef8717b0390e8fb0648e16df1b43610af53 Mon Sep 17 00:00:00 2001
|
|
From: Ban Tao <fengzheng923@gmail.com>
|
|
Date: Tue, 2 Mar 2021 20:40:23 +0800
|
|
Subject: [PATCH 059/117] pwm: sun8i-v536: document device tree bindings
|
|
|
|
This adds binding documentation for sun8i-v536 SoC PWM driver.
|
|
|
|
Signed-off-by: Ban Tao <fengzheng923@gmail.com>
|
|
---
|
|
.../bindings/pwm/pwm-sun8i-v536.txt | 24 +++++++++++++++++++
|
|
1 file changed, 24 insertions(+)
|
|
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
|
|
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
|
|
@@ -0,0 +1,24 @@
|
|
+Allwinner sun8i-v536 SoC PWM controller
|
|
+
|
|
+Required properties:
|
|
+ - compatible: should be "allwinner,<name>-pwm"
|
|
+ "allwinner,sun8i-v833-pwm"
|
|
+ "allwinner,sun8i-v536-pwm"
|
|
+ "allwinner,sun50i-r818-pwm"
|
|
+ "allwinner,sun50i-a133-pwm"
|
|
+ "allwinner,sun50i-r329-pwm"
|
|
+ - reg: physical base address and length of the controller's registers
|
|
+ - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
|
|
+ the cells format.
|
|
+ - clocks: From common clock binding, handle to the parent clock.
|
|
+ - resets: From reset clock binding, handle to the parent clock.
|
|
+
|
|
+Example:
|
|
+
|
|
+ pwm: pwm@300a0000 {
|
|
+ compatible = "allwinner,sun50i-r818-pwm";
|
|
+ reg = <0x0300a000 0x3ff>;
|
|
+ clocks = <&ccu CLK_BUS_PWM>;
|
|
+ resets = <&ccu RST_BUS_PWM>;
|
|
+ #pwm-cells = <3>;
|
|
+ };
|