mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
1c61a8f958
Hardware -------- RockChip RK3588 ARM64 (8 cores) 4/8/16/32GB LPDDR4X RAM 2500 Base-T RGB LED eMMC Connector SPI-NOR 16MB Micro-SD Slot 2x USB 2.0 Port 2x USB 3.0 Port Headphone Jack M.2 E-Key M.2 M-Key USB PD 5/9/12/15/20V Power Install -------- Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/16149 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
73 lines
1.8 KiB
Diff
73 lines
1.8 KiB
Diff
From 42145b7a823530f57983fb6e6897f40c0be278d5 Mon Sep 17 00:00:00 2001
|
|
From: Sebastian Reichel <sebastian.reichel@collabora.com>
|
|
Date: Mon, 18 Sep 2023 16:14:49 +0200
|
|
Subject: [PATCH] arm64: dts: rockchip: add PCIe network controller to rock-5b
|
|
|
|
Enable the RTL8125 network controller, which is connected via
|
|
PCIe.
|
|
|
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
|
Link: https://lore.kernel.org/r/20230918141451.131247-2-sebastian.reichel@collabora.com
|
|
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
---
|
|
.../boot/dts/rockchip/rk3588-rock-5b.dts | 27 +++++++++++++++++++
|
|
1 file changed, 27 insertions(+)
|
|
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
|
|
@@ -43,6 +43,15 @@
|
|
#cooling-cells = <2>;
|
|
};
|
|
|
|
+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc3v3_pcie2x1l2";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ startup-delay-us = <5000>;
|
|
+ vin-supply = <&vcc_3v3_s3>;
|
|
+ };
|
|
+
|
|
vcc5v0_host: vcc5v0-host-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_host";
|
|
@@ -77,6 +86,10 @@
|
|
};
|
|
};
|
|
|
|
+&combphy0_ps {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&cpu_b0 {
|
|
cpu-supply = <&vdd_cpu_big0_s0>;
|
|
};
|
|
@@ -203,6 +216,14 @@
|
|
};
|
|
};
|
|
|
|
+&pcie2x1l2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie2_2_rst>;
|
|
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&pinctrl {
|
|
hym8563 {
|
|
hym8563_int: hym8563-int {
|
|
@@ -216,6 +237,12 @@
|
|
};
|
|
};
|
|
|
|
+ pcie2 {
|
|
+ pcie2_2_rst: pcie2-2-rst {
|
|
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
usb {
|
|
vcc5v0_host_en: vcc5v0-host-en {
|
|
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|