openwrt/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts
Santiago Piccinini 9dc46d6549 ath79: fix LibreRouter-v1 watchdog and poe_pass
Watchdog and poe_passthrough gpios require the jtag disabled.

Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
(cherry picked from commit 2ad949b11d)
2022-10-02 11:40:17 +02:00

218 lines
3.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "librerouter,librerouter-v1", "qca,qca9558";
model = "LibreRouter v1";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "green:system";
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
wifi_green {
label = "green:wlan2g";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
status_blue {
label = "blue:status";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
/* GPIO1 (poe_pass) and GPIO2 (watchdog) requires jtag disabled */
pinctrl-0 = <&jtag_disable_pins>;
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <1000>;
always-running;
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
};
};
&pcie1 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
};
};
&usb_phy0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&usb_phy1 {
status = "okay";
};
&usb1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x7c0000>;
};
partition@810000 {
label = "fw2";
reg = <0x810000 0x7d0000>;
};
partition@fd0000 {
label = "res";
reg = <0xfd0000 0x20000>;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x87600000 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, rx_delay 10 */
0x0c 0x00000080 /* PORT6: SGMII */
0x10 0x81000080 /* POWER_ON_STRAP: LED open drain, SerDes auto-neg disabled */
0x50 0xcf37cf37 /* LED_CTRL0 */
0x54 0xcf37cf37 /* LED_CTRL1 */
0x58 0xcf37cf37 /* LED_CTRL2 */
0x5c 0x0 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0xa6000000 0x00000101 0x00001616>;
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy0>;
};
&eth1 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001616>;
nvmem-cells = <&macaddr_art_6>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
nvmem-cells = <&macaddr_art_c>;
nvmem-cell-names = "mac-address";
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_art_c: macaddr@c {
reg = <0xc 0x6>;
};
};