mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 00:11:13 +00:00
4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
62 lines
1.8 KiB
Diff
62 lines
1.8 KiB
Diff
From a04a6eb3b4d112f3600bbd783249f24a43797e7a Mon Sep 17 00:00:00 2001
|
|
From: Xingyu Wu <xingyu.wu@starfivetech.com>
|
|
Date: Thu, 18 May 2023 18:12:31 +0800
|
|
Subject: [PATCH 057/122] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT
|
|
resets support
|
|
|
|
Add new struct members and auxiliary_device_id of resets to support
|
|
System-Top-Group, Image-Signal-Process and Video-Output on the StarFive
|
|
JH7110 SoC.
|
|
|
|
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
|
|
---
|
|
.../reset/starfive/reset-starfive-jh7110.c | 30 +++++++++++++++++++
|
|
1 file changed, 30 insertions(+)
|
|
|
|
--- a/drivers/reset/starfive/reset-starfive-jh7110.c
|
|
+++ b/drivers/reset/starfive/reset-starfive-jh7110.c
|
|
@@ -31,6 +31,24 @@ static const struct jh7110_reset_info jh
|
|
.status_offset = 0x3C,
|
|
};
|
|
|
|
+static const struct jh7110_reset_info jh7110_stg_info = {
|
|
+ .nr_resets = JH7110_STGRST_END,
|
|
+ .assert_offset = 0x74,
|
|
+ .status_offset = 0x78,
|
|
+};
|
|
+
|
|
+static const struct jh7110_reset_info jh7110_isp_info = {
|
|
+ .nr_resets = JH7110_ISPRST_END,
|
|
+ .assert_offset = 0x38,
|
|
+ .status_offset = 0x3C,
|
|
+};
|
|
+
|
|
+static const struct jh7110_reset_info jh7110_vout_info = {
|
|
+ .nr_resets = JH7110_VOUTRST_END,
|
|
+ .assert_offset = 0x48,
|
|
+ .status_offset = 0x4C,
|
|
+};
|
|
+
|
|
static int jh7110_reset_probe(struct auxiliary_device *adev,
|
|
const struct auxiliary_device_id *id)
|
|
{
|
|
@@ -58,6 +76,18 @@ static const struct auxiliary_device_id
|
|
.name = "clk_starfive_jh7110_sys.rst-aon",
|
|
.driver_data = (kernel_ulong_t)&jh7110_aon_info,
|
|
},
|
|
+ {
|
|
+ .name = "clk_starfive_jh7110_sys.rst-stg",
|
|
+ .driver_data = (kernel_ulong_t)&jh7110_stg_info,
|
|
+ },
|
|
+ {
|
|
+ .name = "clk_starfive_jh7110_sys.rst-isp",
|
|
+ .driver_data = (kernel_ulong_t)&jh7110_isp_info,
|
|
+ },
|
|
+ {
|
|
+ .name = "clk_starfive_jh7110_sys.rst-vo",
|
|
+ .driver_data = (kernel_ulong_t)&jh7110_vout_info,
|
|
+ },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(auxiliary, jh7110_reset_ids);
|