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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From c2b3f2c723e1b558afe5661bb91669e3b68154f7 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 13 Jun 2021 23:52:47 -0500
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Subject: [PATCH 073/117] ASoC: sun4i-spdif: Add support for separate resets
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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sound/soc/sunxi/sun4i-spdif.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/sound/soc/sunxi/sun4i-spdif.c
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+++ b/sound/soc/sunxi/sun4i-spdif.c
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@@ -28,10 +28,11 @@
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#include <sound/soc.h>
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#define SUN4I_SPDIF_CTL (0x00)
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+ #define SUN4I_SPDIF_CTL_RST_RX BIT(12)
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#define SUN4I_SPDIF_CTL_MCLKDIV(v) ((v) << 4) /* v even */
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#define SUN4I_SPDIF_CTL_MCLKOUTEN BIT(2)
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#define SUN4I_SPDIF_CTL_GEN BIT(1)
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- #define SUN4I_SPDIF_CTL_RESET BIT(0)
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+ #define SUN4I_SPDIF_CTL_RST_TX BIT(0)
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#define SUN4I_SPDIF_TXCFG (0x04)
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#define SUN4I_SPDIF_TXCFG_SINGLEMOD BIT(31)
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@@ -196,7 +197,7 @@ static void sun4i_spdif_configure(struct
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const struct sun4i_spdif_quirks *quirks = host->quirks;
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/* soft reset SPDIF */
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- regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
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+ regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RST_TX);
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/* flush TX FIFO */
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regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
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