openwrt/target/linux/ath79/dts/ar9344_aerohive_hiveap-121.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

230 lines
3.4 KiB
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// SPDX-License-Identifier: GPL-2.0-only
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "aerohive,hiveap-121", "qca,ar9344";
model = "Aerohive HiveAP 121";
aliases {
led-boot = &led_power_white;
led-failsafe = &led_power_orange;
led-running = &led_power_white;
led-upgrade = &led_power_orange;
label-mac-device = &eth0;
};
chosen {
bootargs = "console=ttyS0,9600";
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
led_power_white: power_white {
label = "white:power";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
};
i2c {
compatible = "i2c-gpio";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH /* sda */
&gpio 12 GPIO_ACTIVE_HIGH /* scl */
>;
#address-cells = <1>;
#size-cells = <0>;
tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins>;
gpio_ext_lna0 {
gpio-hog;
gpios = <20 0>;
output-low;
line-name = "hiveap-121:ext:lna0";
};
gpio_ext_lna1 {
gpio-hog;
gpios = <19 0>;
output-low;
line-name = "hiveap-121:ext:lna1";
};
gpio_usb_power {
gpio-hog;
gpios = <15 0>;
output-high;
line-name = "hiveap-121:power:usb";
};
};
&usb {
status = "okay";
};
&usb_phy {
status = "okay";
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&hw_info 0x0>;
mtd-mac-address-increment = <2>;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x80000>;
read-only;
};
partition@80000 {
label = "u-boot-env";
reg = <0x80000 0x10000>;
read-only;
};
hw_info: partition@90000 {
label = "hw-info";
reg = <0x90000 0x10000>;
read-only;
};
partition@a0000 {
label = "boot-info";
reg = <0xa0000 0x10000>;
read-only;
};
partition@b0000 {
label = "boot-sinfo";
reg = <0xb0000 0x10000>;
read-only;
};
};
};
};
&wmac {
status = "okay";
mtd-mac-address = <&hw_info 0x0>;
mtd-mac-address-increment = <1>;
};
&nand {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot1";
reg = <0x0 0x400000>;
read-only;
};
partition@400000 {
label = "u-boot-env1";
reg = <0x400000 0x400000>;
read-only;
};
partition@800000 {
label = "kernel";
reg = <0x800000 0x500000>;
};
partition@d00000 {
label = "ubi";
reg = <0xd00000 0x6f00000>;
};
partition@2e00000 {
label = "wifi-info";
reg = <0x7c00000 0x400000>;
read-only;
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&eth0 {
status = "okay";
pll-data = <0x06000000 0x00000101 0x00001313>;
mtd-mac-address = <&hw_info 0x0>;
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
gmac-config {
device = <&gmac>;
rgmii-gmac0 = <1>;
rxd-delay = <1>;
rxdv-delay = <1>;
};
};