openwrt/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
Adrian Schmutzler 7054721cf9 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
2021-02-25 14:42:11 +01:00

260 lines
4.5 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-c7-v4", "qca,qca9563";
model = "TP-Link Archer C7 v4";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
label-mac-device = &eth0;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
num-chipselects = <1>;
led_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <10000000>;
};
};
gpio-export {
compatible = "gpio-export";
gpio_shift_register_oe {
gpio-export,name = "tp-link:oe:sr";
gpio-export,output = <0>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>; // 74HC595 /OE (Output Enable)
};
gpio_shift_register_reset {
gpio-export,name = "tp-link:reset:sr";
gpio-export,output = <1>;
gpios = <&gpio 21 GPIO_ACTIVE_LOW>; // 74HC595 /SRCLR (Serial Clear)
};
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "green:system";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
default-state = "on";
};
usb1 {
label = "green:usb1";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
usb2 {
label = "green:usb2";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan2g {
label = "green:wlan2g";
gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wan {
label = "green:wan";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
};
wan_fail {
label = "orange:wan";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "green:lan1";
gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "green:lan2";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "green:lan3";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "green:lan4";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
};
wps {
label = "green:wps";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pcie {
status = "okay";
};
&usb_phy0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy1 {
status = "okay";
};
&usb1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "factory-uboot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
label = "u-boot";
reg = <0x020000 0x020000>;
read-only;
};
partition@40000 {
label = "firmware";
reg = <0x040000 0xec0000>;
compatible = "denx,uimage";
};
info: partition@f00000 {
label = "info";
reg = <0xf00000 0x0f0000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = <
0x04 0x80080080 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x00000200 /* PORT6_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
phy-mode = "sgmii";
mtd-mac-address = <&info 0x8>;
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
};