mirror of
https://github.com/openwrt/openwrt.git
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667f6c7f49
Manually rebased patches:
bcm27xx/patches-5.4/950-0135-spi-spi-bcm2835-Disable-forced-software-CS.patch
generic-backport/744-v5.5-net-sfp-soft-status-and-control-support.patch
layerscape/patches-5.4/819-uart-0005-tty-serial-fsl_lpuart-enable-dma-mode-for-imx8qxp.patch
mvebu/patches-5.4/521-arm64-dts-marvell-espressobin-Add-ethernet-switch-al.patch
Removed:
layerscape/patches-5.4/819-uart-0012-tty-serial-lpuart-add-LS1028A-support.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711,
lantiq/Easybox 904 xDSL, x86_64
Run-tested: ipq806x/R7800, lantiq/Easybox 904 xDSL, x86_64
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Co-developed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
81 lines
2.8 KiB
Diff
81 lines
2.8 KiB
Diff
From 33b150a792ccde6eded4240dea0e3ec784b07d7c Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.org>
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Date: Tue, 15 Jan 2019 12:39:50 +0000
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Subject: [PATCH] spi: spi-bcm2835: Re-enable HW CS
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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drivers/spi/spi-bcm2835.c | 53 +++++++++++++++++++++++++++++++++++++--
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1 file changed, 51 insertions(+), 2 deletions(-)
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--- a/drivers/spi/spi-bcm2835.c
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+++ b/drivers/spi/spi-bcm2835.c
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@@ -1169,9 +1169,57 @@ static void bcm2835_spi_handle_err(struc
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bcm2835_spi_reset_hw(ctlr);
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}
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-static int chip_match_name(struct gpio_chip *chip, void *data)
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+static void bcm2835_spi_set_cs(struct spi_device *spi, bool gpio_level)
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{
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- return !strcmp(chip->label, data);
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+ /*
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+ * we can assume that we are "native" as per spi_set_cs
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+ * calling us ONLY when cs_gpio is not set
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+ * we can also assume that we are CS < 3 as per bcm2835_spi_setup
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+ * we would not get called because of error handling there.
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+ * the level passed is the electrical level not enabled/disabled
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+ * so it has to get translated back to enable/disable
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+ * see spi_set_cs in spi.c for the implementation
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+ */
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+
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+ struct spi_master *master = spi->master;
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+ struct bcm2835_spi *bs = spi_master_get_devdata(master);
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+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
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+ bool enable;
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+
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+ /* calculate the enable flag from the passed gpio_level */
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+ enable = (spi->mode & SPI_CS_HIGH) ? gpio_level : !gpio_level;
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+
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+ /* set flags for "reverse" polarity in the registers */
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+ if (spi->mode & SPI_CS_HIGH) {
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+ /* set the correct CS-bits */
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+ cs |= BCM2835_SPI_CS_CSPOL;
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+ cs |= BCM2835_SPI_CS_CSPOL0 << spi->chip_select;
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+ } else {
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+ /* clean the CS-bits */
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+ cs &= ~BCM2835_SPI_CS_CSPOL;
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+ cs &= ~(BCM2835_SPI_CS_CSPOL0 << spi->chip_select);
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+ }
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+
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+ /* select the correct chip_select depending on disabled/enabled */
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+ if (enable) {
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+ /* set cs correctly */
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+ if (spi->mode & SPI_NO_CS) {
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+ /* use the "undefined" chip-select */
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+ cs |= BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01;
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+ } else {
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+ /* set the chip select */
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+ cs &= ~(BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01);
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+ cs |= spi->chip_select;
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+ }
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+ } else {
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+ /* disable CSPOL which puts HW-CS into deselected state */
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+ cs &= ~BCM2835_SPI_CS_CSPOL;
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+ /* use the "undefined" chip-select as precaution */
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+ cs |= BCM2835_SPI_CS_CS_10 | BCM2835_SPI_CS_CS_01;
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+ }
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+
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+ /* finally set the calculated flags in SPI_CS */
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+ bcm2835_wr(bs, BCM2835_SPI_CS, cs);
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}
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static int bcm2835_spi_setup(struct spi_device *spi)
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@@ -1277,6 +1325,7 @@ static int bcm2835_spi_probe(struct plat
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ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
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ctlr->num_chipselect = BCM2835_SPI_NUM_CS;
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ctlr->setup = bcm2835_spi_setup;
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+ ctlr->set_cs = bcm2835_spi_set_cs;
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ctlr->transfer_one = bcm2835_spi_transfer_one;
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ctlr->handle_err = bcm2835_spi_handle_err;
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ctlr->prepare_message = bcm2835_spi_prepare_message;
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