mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
446 lines
13 KiB
Diff
446 lines
13 KiB
Diff
From b705c00c484cb018913b250e3fe448576f84bf16 Mon Sep 17 00:00:00 2001
|
|
From: Annaliese McDermond <nh6z@nh6z.net>
|
|
Date: Sun, 17 Mar 2019 16:48:36 -0700
|
|
Subject: [PATCH 415/782] dtoverlays: Add Support for the UDRC/DRAWS
|
|
|
|
Adds a new overlay to support the Northwest Digital Radio
|
|
DRAWS and UDRC HATs. See http://nwdigitalradio.com.
|
|
|
|
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
|
|
---
|
|
arch/arm/boot/dts/overlays/Makefile | 2 +
|
|
arch/arm/boot/dts/overlays/README | 59 ++++++
|
|
arch/arm/boot/dts/overlays/draws-overlay.dts | 200 +++++++++++++++++++
|
|
arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 ++++++++++++
|
|
4 files changed, 389 insertions(+)
|
|
create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
|
|
--- a/arch/arm/boot/dts/overlays/Makefile
|
|
+++ b/arch/arm/boot/dts/overlays/Makefile
|
|
@@ -29,6 +29,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
dionaudio-loco-v2.dtbo \
|
|
dpi18.dtbo \
|
|
dpi24.dtbo \
|
|
+ draws.dtbo \
|
|
dwc-otg.dtbo \
|
|
dwc2.dtbo \
|
|
enc28j60.dtbo \
|
|
@@ -146,6 +147,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
tpm-slb9670.dtbo \
|
|
uart0.dtbo \
|
|
uart1.dtbo \
|
|
+ udrc.dtbo \
|
|
upstream.dtbo \
|
|
upstream-aux-interrupt.dtbo \
|
|
vc4-fkms-v3d.dtbo \
|
|
--- a/arch/arm/boot/dts/overlays/README
|
|
+++ b/arch/arm/boot/dts/overlays/README
|
|
@@ -531,6 +531,59 @@ Load: dtoverlay=dpi24
|
|
Params: <None>
|
|
|
|
|
|
+Name: draws
|
|
+Info: Configures the NW Digital Radio DRAWS Hat
|
|
+
|
|
+ The board includes an ADC to measure various board values and also
|
|
+ provides two analog user inputs on the expansion header. The ADC
|
|
+ can be configured for various sample rates and gain values to adjust
|
|
+ the input range. Tables describing the two parameters follow.
|
|
+
|
|
+ ADC Gain Values:
|
|
+ 0 = +/- 6.144V
|
|
+ 1 = +/- 4.096V
|
|
+ 2 = +/- 2.048V
|
|
+ 3 = +/- 1.024V
|
|
+ 4 = +/- 0.512V
|
|
+ 5 = +/- 0.256V
|
|
+ 6 = +/- 0.256V
|
|
+ 7 = +/- 0.256V
|
|
+
|
|
+ ADC Datarate Values:
|
|
+ 0 = 128sps
|
|
+ 1 = 250sps
|
|
+ 2 = 490sps
|
|
+ 3 = 920sps
|
|
+ 4 = 1600sps (default)
|
|
+ 5 = 2400sps
|
|
+ 6 = 3300sps
|
|
+ 7 = 3300sps
|
|
+Load: dtoverlay=draws,<param>=<val>
|
|
+Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs
|
|
+ input voltage sensor (default 1)
|
|
+
|
|
+ draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage
|
|
+ sensor
|
|
+
|
|
+ draws_adc_ch5_gain Sets the full scale resolution of the ADCs
|
|
+ 5V rail voltage sensor (default 1)
|
|
+
|
|
+ draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage
|
|
+ sensor
|
|
+
|
|
+ draws_adc_ch6_gain Sets the full scale resolution of the ADCs
|
|
+ AIN2 input (default 2)
|
|
+
|
|
+ draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input
|
|
+
|
|
+ draws_adc_ch7_gain Sets the full scale resolution of the ADCs
|
|
+ AIN3 input (default 2)
|
|
+
|
|
+ draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input
|
|
+
|
|
+ alsaname Name of the ALSA audio device (default "draws")
|
|
+
|
|
+
|
|
Name: dwc-otg
|
|
Info: Selects the dwc_otg USB controller driver which has fiq support. This
|
|
is the default on all except the Pi Zero which defaults to dwc2.
|
|
@@ -2117,6 +2170,12 @@ Params: txd1_pin GPIO pin
|
|
rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
|
|
|
|
|
|
+Name: udrc
|
|
+Info: Configures the NW Digital Radio UDRC Hat
|
|
+Load: dtoverlay=udrc,<param>=<val>
|
|
+Params: alsaname Name of the ALSA audio device (default "udrc")
|
|
+
|
|
+
|
|
Name: upstream
|
|
Info: Allow usage of downstream .dtb with upstream kernel. Comprises
|
|
vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
@@ -0,0 +1,200 @@
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+/*
|
|
+ * Device tree overlay for the DRAWS Hardware
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ regulators {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ udrc0_ldoin: udrc0_ldoin {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ldoin";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pps: pps {
|
|
+ compatible = "pps-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pps_pins>;
|
|
+ gpios = <&gpio 7 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tlv320aic32x4: tlv320aic32x4@18 {
|
|
+ compatible = "ti,tlv320aic32x4";
|
|
+ reg = <0x18>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ clock-names = "mclk";
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
|
|
+
|
|
+ reset-gpios = <&gpio 13 0>;
|
|
+
|
|
+ iov-supply = <&udrc0_ldoin>;
|
|
+ ldoin-supply = <&udrc0_ldoin>;
|
|
+ };
|
|
+
|
|
+ sc16is752: sc16is752@50 {
|
|
+ compatible = "nxp,sc16is752";
|
|
+ reg = <0x50>;
|
|
+ clocks = <&sc16is752_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sc16is752_irq>;
|
|
+
|
|
+ sc16is752_clk: sc16is752_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <1843200>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ tla2024: tla2024@48 {
|
|
+ compatible = "ti,ads1015";
|
|
+ reg = <0x48>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ adc_ch4: channel@4 {
|
|
+ reg = <4>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch5: channel@5 {
|
|
+ reg = <5>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch6: channel@6 {
|
|
+ reg = <6>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch7: channel@7 {
|
|
+ reg = <7>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "draws";
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "IN1_R", "Line In",
|
|
+ "IN1_L", "Line In",
|
|
+ "CM_L", "Line In",
|
|
+ "CM_R", "Line In",
|
|
+ "Line Out", "LOR",
|
|
+ "Line Out", "LOL";
|
|
+
|
|
+ dailink0_master: simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&tlv320aic32x4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpclk0_pin: gpclk0_pin {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ aic3204_reset: aic3204_reset {
|
|
+ brcm,pins = <13>;
|
|
+ brcm,function = <1>;
|
|
+ brcm,pull = <1>;
|
|
+ };
|
|
+
|
|
+ aic3204_gpio: aic3204_gpio {
|
|
+ brcm,pins = <26>;
|
|
+ };
|
|
+
|
|
+ sc16is752_irq: sc16is752_irq {
|
|
+ brcm,pins = <17>;
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <2>;
|
|
+ };
|
|
+
|
|
+ pps_pins: pps_pins {
|
|
+ brcm,pins = <7>;
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
|
|
+ draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
|
|
+ draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
|
|
+ draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
|
|
+ draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
|
|
+ draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
|
|
+ draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
|
|
+ draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
|
|
+ alsaname = <&snd>, "simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
@@ -0,0 +1,128 @@
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+/*
|
|
+ * Device tree overlay for the Universal Digital Radio Controller
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
|
|
+ clock-names = "pcm";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ regulators {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ udrc0_ldoin: udrc0_ldoin {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ldoin";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ tlv320aic32x4: tlv320aic32x4@18 {
|
|
+ compatible = "ti,tlv320aic32x4";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x18>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ clock-names = "mclk";
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
|
|
+
|
|
+ reset-gpios = <&gpio 13 0>;
|
|
+
|
|
+ iov-supply = <&udrc0_ldoin>;
|
|
+ ldoin-supply = <&udrc0_ldoin>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "udrc";
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "IN1_R", "Line In",
|
|
+ "IN1_L", "Line In",
|
|
+ "CM_L", "Line In",
|
|
+ "CM_R", "Line In",
|
|
+ "Line Out", "LOR",
|
|
+ "Line Out", "LOL";
|
|
+
|
|
+ dailink0_master: simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&tlv320aic32x4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpclk0_pin: gpclk0_pin {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ aic3204_reset: aic3204_reset {
|
|
+ brcm,pins = <13>;
|
|
+ brcm,function = <1>;
|
|
+ brcm,pull = <1>;
|
|
+ };
|
|
+
|
|
+ aic3204_gpio: aic3204_gpio {
|
|
+ brcm,pins = <26>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ alsaname = <&snd>, "simple-audio-card,name";
|
|
+ };
|
|
+};
|