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9a1d7ff187
Refreshed all patches. Remove upstreamed: - 950-0434-mmc-bcm2835-Recover-from-MMC_SEND_EXT_CSD.patch Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
114 lines
3.1 KiB
Diff
114 lines
3.1 KiB
Diff
From 9d3b968d13ba1eecaf22d5824cf8fd270c061534 Mon Sep 17 00:00:00 2001
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From: Linus Walleij <linus.walleij@linaro.org>
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Date: Sat, 15 Jul 2017 21:02:06 +0200
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Subject: [PATCH 16/31] ARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685
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This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel
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to the DIR-685 device tree.
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This brings graphics to this funky router and it is possible to
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even run a console on its tiny screen.
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Incidentally this requires us to disable the access to the
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parallel (NOR) flash, as the communication pins to the panel
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are shared with the flash memory.
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To access the flash, a separate kernel with the panel disabled
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and the flash enabled should be booted. The pin control selecting
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whether to use the lines cannot be altered at runtime due to
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hardware constraints.
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Cc: David Lechner <david@lechnology.com>
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Cc: Stefano Babic <sbabic@denx.de>
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Cc: Ben Dooks <ben.dooks@codethink.co.uk>
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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---
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arch/arm/boot/dts/gemini-dlink-dir-685.dts | 63 +++++++++++++++++++++++++++++-
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1 file changed, 62 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
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+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
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@@ -45,6 +45,47 @@
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};
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};
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+ vdisp: regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "display-power";
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+ regulator-min-microvolt = <3600000>;
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+ regulator-max-microvolt = <3600000>;
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+ /* Collides with LCD E */
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+ gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ spi {
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+ compatible = "spi-gpio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* Collides with IDE pins, that's cool (we do not use them) */
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+ gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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+ gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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+ gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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+ /* Collides with pflash CE1, not so cool */
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+ cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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+ num-chipselects = <1>;
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+
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+ panel: display@0 {
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+ compatible = "dlink,dir-685-panel", "ilitek,ili9322";
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+ reg = <0>;
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+ /* 50 ns min period = 20 MHz */
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+ spi-max-frequency = <20000000>;
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+ spi-cpol; /* Clock active low */
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+ vcc-supply = <&vdisp>;
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+ iovcc-supply = <&vdisp>;
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+ vci-supply = <&vdisp>;
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+
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+ port {
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+ panel_in: endpoint {
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+ remote-endpoint = <&display_out>;
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+ };
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+ };
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+ };
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+ };
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+
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leds {
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compatible = "gpio-leds";
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led-wps {
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@@ -115,7 +156,16 @@
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soc {
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flash@30000000 {
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- status = "okay";
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+ /*
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+ * Flash access is by default disabled, because it
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+ * collides with the Chip Enable signal for the display
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+ * panel, that reuse the parallel flash Chip Select 1
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+ * (CS1). Enabling flash makes graphics stop working.
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+ *
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+ * We might be able to hack around this by letting
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+ * GPIO poke around in the flash controller registers.
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+ */
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+ /* status = "okay"; */
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/* 32MB of flash */
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reg = <0x30000000 0x02000000>;
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@@ -238,5 +288,16 @@
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ata@63000000 {
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status = "okay";
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};
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+
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+ display-controller@6a000000 {
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+ status = "okay";
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+
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+ port@0 {
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+ reg = <0>;
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+ display_out: endpoint {
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+ remote-endpoint = <&panel_in>;
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+ };
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+ };
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+ };
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};
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};
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