mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
5e49c57956
1)Changes - Rebased the patches for linux-4.4.7 - Added patch to fix spi nor fifo and dma support - Added patch to configure watchdog barktime 2)Testing Tested on IPQ AP148 Board: a. NOR boot and NAND boot b. ethernet network and ath10k wifi c. ubi sysupgrade UnTested dwc3 usb has not been validated on IPQ board(AP148) 3)Known Issues: Once we flash ubi image on AP148, and if we reset the board, uboot on first boot creates PEB and LEB for dynamic sized partitions, which is incorrect and not what linux expects which causes errors when trying to mount rootfs. In order to test this, we can use the below steps: a. Flash the ubi image on board and don't reset the board b. load the kernel fit image in RAM and boot from there. Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
126 lines
2.5 KiB
Diff
126 lines
2.5 KiB
Diff
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -92,5 +92,29 @@
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sata@29000000 {
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status = "ok";
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};
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+
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+ phy@100f8800 { /* USB3 port 1 HS phy */
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+ status = "ok";
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+ };
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+
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+ phy@100f8830 { /* USB3 port 1 SS phy */
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+ status = "ok";
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+ };
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+
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+ phy@110f8800 { /* USB3 port 0 HS phy */
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+ status = "ok";
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+ };
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+
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+ phy@110f8830 { /* USB3 port 0 SS phy */
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+ status = "ok";
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+ };
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+
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+ usb30@0 {
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+ status = "ok";
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+ };
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+
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+ usb30@1 {
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+ status = "ok";
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+ };
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};
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};
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -333,6 +333,90 @@
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compatible = "syscon";
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reg = <0x01200600 0x100>;
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};
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+
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+ hs_phy_1: phy@100f8800 {
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+ compatible = "qcom,dwc3-hs-usb-phy";
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+ reg = <0x100f8800 0x30>;
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+ clocks = <&gcc USB30_1_UTMI_CLK>;
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+ clock-names = "ref";
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+ #phy-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+
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+ ss_phy_1: phy@100f8830 {
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+ compatible = "qcom,dwc3-ss-usb-phy";
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+ reg = <0x100f8830 0x30>;
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+ clocks = <&gcc USB30_1_MASTER_CLK>;
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+ clock-names = "ref";
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+ #phy-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+
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+ hs_phy_0: phy@110f8800 {
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+ compatible = "qcom,dwc3-hs-usb-phy";
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+ reg = <0x110f8800 0x30>;
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+ clocks = <&gcc USB30_0_UTMI_CLK>;
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+ clock-names = "ref";
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+ #phy-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+
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+ ss_phy_0: phy@110f8830 {
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+ compatible = "qcom,dwc3-ss-usb-phy";
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+ reg = <0x110f8830 0x30>;
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+ clocks = <&gcc USB30_0_MASTER_CLK>;
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+ clock-names = "ref";
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+ #phy-cells = <0>;
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+
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+ status = "disabled";
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+ };
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+
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+ usb3_0: usb30@0 {
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+ compatible = "qcom,dwc3";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ clocks = <&gcc USB30_0_MASTER_CLK>;
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+ clock-names = "core";
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+
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+ ranges;
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+
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+ status = "disabled";
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+
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+ dwc3@11000000 {
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+ compatible = "snps,dwc3";
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+ reg = <0x11000000 0xcd00>;
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+ interrupts = <0 110 0x4>;
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+ phys = <&hs_phy_0>, <&ss_phy_0>;
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+ phy-names = "usb2-phy", "usb3-phy";
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+ tx-fifo-resize;
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+ dr_mode = "host";
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+ };
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+ };
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+
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+ usb3_1: usb30@1 {
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+ compatible = "qcom,dwc3";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ clocks = <&gcc USB30_1_MASTER_CLK>;
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+ clock-names = "core";
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+
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+ ranges;
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+
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+ status = "disabled";
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+
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+ dwc3@10000000 {
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+ compatible = "snps,dwc3";
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+ reg = <0x10000000 0xcd00>;
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+ interrupts = <0 205 0x4>;
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+ phys = <&hs_phy_1>, <&ss_phy_1>;
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+ phy-names = "usb2-phy", "usb3-phy";
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+ tx-fifo-resize;
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+ dr_mode = "host";
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+ };
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+ };
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};
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sfpb_mutex: sfpb-mutex {
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