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a7c7a3c009
Backport some qcom clock fixes for krait and hfpll driver. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
42 lines
1.4 KiB
Diff
42 lines
1.4 KiB
Diff
From fcfbfe373d41b4728ffec075f8f91b6572a88c27 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Sat, 30 Apr 2022 07:44:56 +0200
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Subject: [PATCH 1/3] clk: qcom: clk-hfpll: use poll_timeout macro
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Use regmap_read_poll_timeout macro instead of do-while structure to tidy
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things up. Also set a timeout to prevent any sort of system stall.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220430054458.31321-2-ansuelsmth@gmail.com
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---
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drivers/clk/qcom/clk-hfpll.c | 15 +++++++++------
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1 file changed, 9 insertions(+), 6 deletions(-)
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--- a/drivers/clk/qcom/clk-hfpll.c
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+++ b/drivers/clk/qcom/clk-hfpll.c
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@@ -72,13 +72,16 @@ static void __clk_hfpll_enable(struct cl
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regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N);
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/* Wait for PLL to lock. */
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- if (hd->status_reg) {
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- do {
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- regmap_read(regmap, hd->status_reg, &val);
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- } while (!(val & BIT(hd->lock_bit)));
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- } else {
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+ if (hd->status_reg)
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+ /*
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+ * Busy wait. Should never timeout, we add a timeout to
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+ * prevent any sort of stall.
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+ */
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+ regmap_read_poll_timeout(regmap, hd->status_reg, val,
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+ !(val & BIT(hd->lock_bit)), 0,
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+ 100 * USEC_PER_MSEC);
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+ else
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udelay(60);
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- }
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/* Enable PLL output. */
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regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);
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