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58f4667a37
New stm32 target introduces support for stm32mp1 based devices.
For now it includes an initial support of the STM32MP135F-DK device.
The specifications bellow only list supported features.
Specifications
--------------
SOC: STM32MP135FAF7
RAM: 512 MiB
Storage: SD Card
Ethernet: 2x 100 Mbps
Wireless: 2.4GHz Cypress CYW43455 (802.11b/g/n)
LEDs: Heartbeat (Blue)
Buttons: 1x Reset, 1x User (USER2)
USB: 4x 2.0 Type-A
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://github.com/openwrt/openwrt/pull/16716
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 851e7f77e4
)
Link: https://github.com/openwrt/openwrt/pull/17097
Signed-off-by: Petr Štetiar <ynezz@true.cz>
72 lines
2.2 KiB
Diff
72 lines
2.2 KiB
Diff
From bb7ab910631ee0ade0758a3c4aa8dadc3b6934b6 Mon Sep 17 00:00:00 2001
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From: Marek Vasut <marex@denx.de>
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Date: Tue, 11 Jun 2024 10:36:02 +0200
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Subject: [PATCH 5/8] net: stmmac: dwmac-stm32: Extract PMCR configuration
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Pull the PMCR clock mux configuration into a separate function. This is
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the final change of three, which moves external clock rate validation,
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external clock selector decoding, and clock mux configuration into
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separate functions. This should make the code easier to understand.
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No functional change intended.
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Signed-off-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 27 ++++++++++++-------
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1 file changed, 17 insertions(+), 10 deletions(-)
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
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@@ -219,15 +219,11 @@ static int stm32mp1_validate_ethck_rate(
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return -EINVAL;
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}
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-static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
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+static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)
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{
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struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
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u32 reg = dwmac->mode_reg;
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- int val, ret;
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-
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- ret = stm32mp1_select_ethck_external(plat_dat);
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- if (ret)
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- return ret;
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+ int val;
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switch (plat_dat->mac_interface) {
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case PHY_INTERFACE_MODE_MII:
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@@ -262,10 +258,6 @@ static int stm32mp1_set_mode(struct plat
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return -EINVAL;
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}
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- ret = stm32mp1_validate_ethck_rate(plat_dat);
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- if (ret)
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- return ret;
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-
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/* Need to update PMCCLRR (clear register) */
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regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
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dwmac->ops->syscfg_eth_mask);
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@@ -275,6 +267,21 @@ static int stm32mp1_set_mode(struct plat
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dwmac->ops->syscfg_eth_mask, val);
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}
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+static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
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+{
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+ int ret;
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+
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+ ret = stm32mp1_select_ethck_external(plat_dat);
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+ if (ret)
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+ return ret;
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+
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+ ret = stm32mp1_validate_ethck_rate(plat_dat);
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+ if (ret)
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+ return ret;
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+
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+ return stm32mp1_configure_pmcr(plat_dat);
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+}
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+
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static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
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{
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struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
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