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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
48 lines
1.5 KiB
Diff
48 lines
1.5 KiB
Diff
From 9c64858d41cc65982aaf36866ffa8e04b9792718 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.org>
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Date: Fri, 12 Jul 2019 15:38:35 +0100
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Subject: [PATCH] i2c: bcm2835: Set clock-stretch timeout to 35ms
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The BCM2835 I2C blocks have a register to set the clock-stretch
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timeout - how long the device is allowed to hold SCL low - in bus
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cycles. The current driver doesn't write to the register, therefore
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the default value of 64 cycles is being used for all devices.
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Set the timeout to the value recommended for SMBus - 35ms.
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See: https://github.com/raspberrypi/linux/issues/3064
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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drivers/i2c/busses/i2c-bcm2835.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/drivers/i2c/busses/i2c-bcm2835.c
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+++ b/drivers/i2c/busses/i2c-bcm2835.c
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@@ -188,6 +188,7 @@ static int clk_bcm2835_i2c_set_rate(stru
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{
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struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
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u32 redl, fedl;
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+ u32 clk_tout;
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u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate);
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if (divider == -EINVAL)
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@@ -211,6 +212,17 @@ static int clk_bcm2835_i2c_set_rate(stru
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bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL,
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(fedl << BCM2835_I2C_FEDL_SHIFT) |
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(redl << BCM2835_I2C_REDL_SHIFT));
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+
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+ /*
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+ * Set the clock stretch timeout to the SMBUs-recommended 35ms.
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+ */
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+ if (rate > 0xffff*1000/35)
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+ clk_tout = 0xffff;
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+ else
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+ clk_tout = 35*rate/1000;
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+
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+ bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_CLKT, clk_tout);
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+
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return 0;
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}
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