mirror of
https://github.com/openwrt/openwrt.git
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b506c964a2
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.61
Manually rebased:
bcm27xx/patches-6.6/950-0998-i2c-designware-Add-support-for-bus-clear-feature.patch
All other patches automatically rebased.
Build system: x86/64
Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/16959
(cherry picked from commit 487ca61f91)
Link: https://github.com/openwrt/openwrt/pull/17055
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
81 lines
2.7 KiB
Diff
81 lines
2.7 KiB
Diff
From cea76e589d797371e4259027451bc279a10d550a Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 16 Jan 2024 16:03:14 +0000
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Subject: [PATCH 0864/1085] i2c: designware: Support non-standard bus speeds
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Add support for non-standard bus speeds by treating them as detuned
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versions of the slowest standard speed not less than the requested
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speed.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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drivers/i2c/busses/i2c-designware-common.c | 27 ++++++++++++++++++++++
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drivers/i2c/busses/i2c-designware-core.h | 1 +
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drivers/i2c/busses/i2c-designware-master.c | 2 +-
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3 files changed, 29 insertions(+), 1 deletion(-)
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--- a/drivers/i2c/busses/i2c-designware-common.c
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+++ b/drivers/i2c/busses/i2c-designware-common.c
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@@ -318,6 +318,9 @@ void i2c_dw_adjust_bus_speed(struct dw_i
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{
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u32 acpi_speed = i2c_dw_acpi_round_bus_speed(dev->dev);
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struct i2c_timings *t = &dev->timings;
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+ u32 wanted_speed;
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+ u32 legal_speed = 0;
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+ int i;
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/*
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* Find bus speed from the "clock-frequency" device property, ACPI
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@@ -329,6 +332,30 @@ void i2c_dw_adjust_bus_speed(struct dw_i
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t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
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else
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t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
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+
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+ wanted_speed = t->bus_freq_hz;
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+
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+ /* For unsupported speeds, scale down the lowest speed which is faster. */
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+ for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) {
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+ /* supported speeds is in decreasing order */
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+ if (wanted_speed == supported_speeds[i]) {
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+ legal_speed = 0;
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+ break;
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+ }
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+ if (wanted_speed > supported_speeds[i])
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+ break;
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+
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+ legal_speed = supported_speeds[i];
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+ }
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+
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+ if (legal_speed) {
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+ /*
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+ * Pretend this was the requested speed, but preserve the preferred
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+ * speed so the clock counts can be scaled.
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+ */
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+ t->bus_freq_hz = legal_speed;
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+ dev->wanted_bus_speed = wanted_speed;
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+ }
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}
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EXPORT_SYMBOL_GPL(i2c_dw_adjust_bus_speed);
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--- a/drivers/i2c/busses/i2c-designware-core.h
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+++ b/drivers/i2c/busses/i2c-designware-core.h
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@@ -293,6 +293,7 @@ struct dw_i2c_dev {
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u16 fp_lcnt;
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u16 hs_hcnt;
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u16 hs_lcnt;
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+ u32 wanted_bus_speed;
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int (*acquire_lock)(void);
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void (*release_lock)(void);
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int semaphore_idx;
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--- a/drivers/i2c/busses/i2c-designware-master.c
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+++ b/drivers/i2c/busses/i2c-designware-master.c
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@@ -41,7 +41,7 @@ static void i2c_dw_configure_fifo_master
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static u16 clock_calc(struct dw_i2c_dev *dev, bool want_high)
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{
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struct i2c_timings *t = &dev->timings;
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- u32 wanted_speed = t->bus_freq_hz;
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+ u32 wanted_speed = dev->wanted_bus_speed ?: t->bus_freq_hz;
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u32 clk_khz = i2c_dw_clk_rate(dev);
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u32 extra_ns = want_high ? t->scl_fall_ns : t->scl_rise_ns;
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u32 extra_cycles = (u32)div_u64((u64)clk_khz * extra_ns, 1000000);
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