mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 23:12:32 +00:00
118 lines
3.6 KiB
Diff
118 lines
3.6 KiB
Diff
From 7f353accca6e4a3222991c65b1a6801503973bd3 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
|
|
Date: Fri, 2 Jul 2021 16:44:10 +0200
|
|
Subject: [PATCH] PCI: aardvark: Add support for masking MSI interrupts
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
We should not unmask MSIs at setup, but only when kernel asks for them
|
|
to be unmasked.
|
|
|
|
At setup, mask all MSIs, and implement IRQ chip callbacks for masking
|
|
and unmasking particular MSIs.
|
|
|
|
Signed-off-by: Pali Rohár <pali@kernel.org>
|
|
Signed-off-by: Marek Behún <kabel@kernel.org>
|
|
---
|
|
drivers/pci/controller/pci-aardvark.c | 54 ++++++++++++++++++++++++---
|
|
1 file changed, 49 insertions(+), 5 deletions(-)
|
|
|
|
--- a/drivers/pci/controller/pci-aardvark.c
|
|
+++ b/drivers/pci/controller/pci-aardvark.c
|
|
@@ -281,6 +281,7 @@ struct advk_pcie {
|
|
raw_spinlock_t irq_lock;
|
|
struct irq_domain *msi_domain;
|
|
struct irq_domain *msi_inner_domain;
|
|
+ raw_spinlock_t msi_irq_lock;
|
|
DECLARE_BITMAP(msi_used, MSI_IRQ_NUM);
|
|
struct mutex msi_used_lock;
|
|
u16 msi_msg;
|
|
@@ -577,12 +578,10 @@ static void advk_pcie_setup_hw(struct ad
|
|
advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
|
|
advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
|
|
|
|
- /* Disable All ISR0/1 Sources */
|
|
+ /* Disable All ISR0/1 and MSI Sources */
|
|
advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG);
|
|
advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);
|
|
-
|
|
- /* Unmask all MSIs */
|
|
- advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);
|
|
+ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);
|
|
|
|
/* Unmask summary MSI interrupt */
|
|
reg = advk_readl(pcie, PCIE_ISR0_MASK_REG);
|
|
@@ -1196,10 +1195,52 @@ static int advk_msi_set_affinity(struct
|
|
return -EINVAL;
|
|
}
|
|
|
|
+static void advk_msi_irq_mask(struct irq_data *d)
|
|
+{
|
|
+ struct advk_pcie *pcie = d->domain->host_data;
|
|
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
|
|
+ unsigned long flags;
|
|
+ u32 mask;
|
|
+
|
|
+ raw_spin_lock_irqsave(&pcie->msi_irq_lock, flags);
|
|
+ mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
|
|
+ mask |= BIT(hwirq);
|
|
+ advk_writel(pcie, mask, PCIE_MSI_MASK_REG);
|
|
+ raw_spin_unlock_irqrestore(&pcie->msi_irq_lock, flags);
|
|
+}
|
|
+
|
|
+static void advk_msi_irq_unmask(struct irq_data *d)
|
|
+{
|
|
+ struct advk_pcie *pcie = d->domain->host_data;
|
|
+ irq_hw_number_t hwirq = irqd_to_hwirq(d);
|
|
+ unsigned long flags;
|
|
+ u32 mask;
|
|
+
|
|
+ raw_spin_lock_irqsave(&pcie->msi_irq_lock, flags);
|
|
+ mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
|
|
+ mask &= ~BIT(hwirq);
|
|
+ advk_writel(pcie, mask, PCIE_MSI_MASK_REG);
|
|
+ raw_spin_unlock_irqrestore(&pcie->msi_irq_lock, flags);
|
|
+}
|
|
+
|
|
+static void advk_msi_top_irq_mask(struct irq_data *d)
|
|
+{
|
|
+ pci_msi_mask_irq(d);
|
|
+ irq_chip_mask_parent(d);
|
|
+}
|
|
+
|
|
+static void advk_msi_top_irq_unmask(struct irq_data *d)
|
|
+{
|
|
+ pci_msi_unmask_irq(d);
|
|
+ irq_chip_unmask_parent(d);
|
|
+}
|
|
+
|
|
static struct irq_chip advk_msi_bottom_irq_chip = {
|
|
.name = "MSI",
|
|
.irq_compose_msi_msg = advk_msi_irq_compose_msi_msg,
|
|
.irq_set_affinity = advk_msi_set_affinity,
|
|
+ .irq_mask = advk_msi_irq_mask,
|
|
+ .irq_unmask = advk_msi_irq_unmask,
|
|
};
|
|
|
|
static int advk_msi_irq_domain_alloc(struct irq_domain *domain,
|
|
@@ -1289,7 +1330,9 @@ static const struct irq_domain_ops advk_
|
|
};
|
|
|
|
static struct irq_chip advk_msi_irq_chip = {
|
|
- .name = "advk-MSI",
|
|
+ .name = "advk-MSI",
|
|
+ .irq_mask = advk_msi_top_irq_mask,
|
|
+ .irq_unmask = advk_msi_top_irq_unmask,
|
|
};
|
|
|
|
static struct msi_domain_info advk_msi_domain_info = {
|
|
@@ -1303,6 +1346,7 @@ static int advk_pcie_init_msi_irq_domain
|
|
struct device *dev = &pcie->pdev->dev;
|
|
phys_addr_t msi_msg_phys;
|
|
|
|
+ raw_spin_lock_init(&pcie->msi_irq_lock);
|
|
mutex_init(&pcie->msi_used_lock);
|
|
|
|
msi_msg_phys = virt_to_phys(&pcie->msi_msg);
|