openwrt/target/linux/ramips/dts/ZBT-WG2626.dts
Mathias Kresin f1d0eba3ea ramips: cleanup dts files of mt7621 based boards
Fix a typo in mt7621.dtsi compatible string. Disable spi, sdhci and pci
in mt7621.dtsi and enable the nodes in the indiviual board dts files.
The nodes require further device specific configuration anyway.

Remove the m25p80@0 spi child node from mt7621.dtsi and add the
chunked-io parameter to the individual board dts files. Fix the spi
flash compatible string for the WNDR3700V5.

Drop the mt7621-eval-board compatible string for all boards which are
not the eval board.

Drop the linux,modalias parameter from spi flash node.

Remove the xhci node from board files, it is already enabled in dtsi.
Disable xhci for boards not having usb ports populated.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2016-11-23 08:36:10 +01:00

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/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "ZBT-WG2626";
memory@0 {
device_type = "memory";
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
};
chosen {
bootargs = "console=ttyS0,115200";
};
palmbus: palmbus@1E000000 {
i2c@900 {
status = "okay";
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 18 1>;
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
status {
label = "zbt-wg2626:green:status";
gpios = <&gpio0 24 1>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
m25p,chunked-io = <32>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
&pcie {
status = "okay";
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
mediatek,2ghz = <0>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
mediatek,5ghz = <0>;
};
};
};
&ethernet {
mtd-mac-address = <&factory 0xe000>;
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "wdt", "rgmii2", "wdt rst", "jtag", "mdio";
ralink,function = "gpio";
};
};
};