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c4143505e0
The setup is the same for all devices, so move it up one level. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
48 lines
697 B
Plaintext
48 lines
697 B
Plaintext
#include "mt7620a_phicomm_k2x.dtsi"
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/ {
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compatible = "phicomm,k2g", "ralink,mt7620a-soc";
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model = "Phicomm K2G";
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};
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&partitions {
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partition@50000 {
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reg = <0x50000 0x50000>;
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label = "permanent_config";
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read-only;
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};
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partition@a0000 {
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compatible = "denx,uimage";
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reg = <0xa0000 0x760000>;
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label = "firmware";
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};
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};
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii2_pins &mdio_pins>;
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mediatek,portmap = "llllw";
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port@5 {
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status = "okay";
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phy-handle = <&phy5>;
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phy-mode = "rgmii";
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};
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mdio-bus {
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status = "okay";
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phy5: ethernet-phy@5 {
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reg = <5>;
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phy-mode = "rgmii";
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};
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};
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};
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&wmac {
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pinctrl-names = "default";
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pinctrl-0 = <&pa_pins>;
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};
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